Mitel MT90840 manual Absolute Maximum Ratings, Parameter Symbol Min Max Units

MT90840 Preliminary Information

synchronization scheme may be used in applications such as the proposed MVIP multi-chassis level 3 interface (MC-3 system) utilizing point-to-point or point-to-multipoint switching connections.

When the MT90840 operates in a ring application, the Parallel Data Bypass mode is provided to allow

all or part of the received input parallel data to be bypassed to the output parallel port feeding the ring back with the data which is not destined for the local station. The data destined for the local station can be dropped through CPU programming. In this mode, the CPU has full control of the outgoing bandwidth (from the serial interface to the high speed link) so that it does not contend with the bypassed data.

Absolute Maximum Ratings*

	Parameter	Symbol	Min	Max	Units
1	Supply Voltage	VDD	0	6	V
2	Voltage on any I/O pin	VI	VSS-0.3	VDD+0.3	V
3	Continuous Current at Digital Outputs	IO		40	mA
4	Storage Temperature	TS	-65	+150	°C
5	Package Power Dissipation	PD		2	W

* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.

Recommended Operating Conditions - Voltages are with respect to ground (VSS) unless otherwise stated.

		Characteristics	Sym		Min	Typ	Max		Units		Test Conditions
1	Operating Temperature		TOP	-40			+85		°C
2	Positive Supply		VDD	4.75		5.0	5.25		V
3	Input Voltage		VI	0			VDD		V
DC Electrical Characteristics - Voltages are with respect to ground (VSS) unless otherwise stated.
		Characteristics	Sym		Min	Typ‡	Max	Units			Test Conditions/Pins
1		Supply Current at	IDD			100	160		mA	Outputs unloaded
		19.44 Mbyte/sec & 4 Mbps
2	I	Input High Voltage	VIH		2.0				V	TTL inputs (most pins)
	N
3		Input Low Voltage	VIL				0.8		V	TTL inputs (most pins)
	P
4	U	Input High-Going Threshold	VT+			2.8	4.2		V	Schmitt inputs
	T
5		Input Low-Going Threshold	VT-		0.9	1.8			V	Schmitt inputs
	S
6		Input Leakage (I/O pins)	IIL				50		μA	VI between VSS and VDD
7		Input Pin Capacitance	CI				10		pF
8		Output High Voltage	VOH		2.4				V	Sourcing IOH
9	O	Output Low Voltage	VOL				0.4		V	Sinking IOL
10		Output High Current	IOH		9				mA	Pins: STi4-7, STo4-7
	U
		(sourcing at VOH)	or
	T				16				mA	TDO, RPA, DTA, AD7-0, F0,
		or	IOL
	P									SPCKo, STi0-3, STo0-3
		Output Low Current
	U
		(sinking at VOL)			28				mA	PDo0-7, CTo3-0, PPFTo
	T
									μA
11	S	High Impedance Leakage	IOZ				5			VO between VSS and VDD.
										Pins: PDo0-7, CTo3-0
12		Output Pin Capacitance	CO				10		pF
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
2-262