Terminal Input/Output Control
The 162Bug initial stack completely changes all 8KB of memory at addresses $FFE0C000 through $FFE0DFFF at power up or reset.
Type of Memory Present | Default DRAM | Default SRAM | |
Base Address | Base Address | ||
| |||
|
|
| |
A single DRAM mezzanine | $00000000 | FFE00000 | |
|
| (onboard SRAM) | |
A single SRAM mezzanine | N/A | $00000000 | |
A DRAM mezzanine stacked with an SRAM mezzanine | $00000000 | $E1000000 | |
Two DRAM mezzanines stacked | $00000000 | $FFE00000 | |
|
| (onboard SRAM) |
DRAM can be ECC or parity type. DRAM mezzanines are mapped in contiguously starting at zero ($00000000), largest first. With two mezzanines of the same size, ECC type DRAM is first. If both are ECC type, the bottom one is first.
The 162Bug requires 2KB of NVRAM for storage of board configuration, communication, and booting parameters. This storage area begins at $FFFC16F8 and ends at $FFFC1EF7.
162Bug requires a minimum of 64KB of contiguous read/write memory to operate. The ENV command controls where this block of memory is located. Regardless of where the onboard RAM is located, the first 64KB is used for 162Bug stack and static variable space and the rest is reserved as user space. Whenever the MVME162 is reset, the target PC is initialized to the address corresponding to the beginning of the user space, and the target stack pointers are initialized to addresses within the user space, with the target Interrupt Stack Pointer (ISP) set to the top of the user space.
Terminal Input/Output Control
When entering a command at the prompt, the following control codes may be entered for limited command line editing.
3 |
MVME162IG/D2 |
