Chapter 4. Software Management | ||
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| The options are 25%, 50%, 75%, 90% and 100%. | |
EFCI Marking | (Default - Disable); options: Enable, Disable | |
| Enables EFCI marking while FIFO is in congested state. Setting this | |
| parameter to Enable causes the EFCI marking of all cells that are received, | |
| while FIFO is in a congested state. |
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CLP Dropping | (Default - Disable); options: Enable, Disable | |
| Enables CLP dropping when FIFO is congested. Setting this parameter to | |
| Enable causes cells - with CLP bit set - to be dropped, if they are received | |
| while FIFO is in a congested state. |
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Early Packet | (Default - Disable); options: Enable, Disable | |
Discard |
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Enables entire frame, except for last cell, to be dropped when FIFO is congested. Setting this parameter to Enable causes frames to be dropped, if they are received while FIFO is in a congested state.
Right/Left
Module
Configuration
The two windows (Left and Right module configuration, options 2 and 3 in the Configuration menu) are identical.
LEFT MODULE
1.Port Enable/Disable: Enable
2.Transmit Clock Source: Loopback
3. Loopback State: | Disable |
4.SONET/SDH Frame Type: STM-1 (SDH)
ESC. Exit
Port Enable/Disable (Default - Enable); options: Enable, Disable
If the port is Disabled, no data will be received at the port. Transmit functions are not changed. Remote loop is still available. If the port is Enabled, received data is transferred to the other port.
Transmit Clock (Default - Local timing); options: Local timing, Loopback timing
Source
This parameter selects the clock source for the transmit clock. "Local timing" selects the clock that is derived from the oscillator on board. "Loopback timing" selects the clock recovered from the received data to be the source. Note that for an E1 interface, the default is "Loopback timing" and should not be changed. Do not configure the module for Loopback timing while it is in Internal Loopback mode.
Configuration Window |
