Analog Modules
5-38 S7-400, M7-400 Programmable Controllers Module Specifications
A5E00069467-07
Basic Execution Time of the Analog Output Channels
The basic execution time corresponds to the cycle time for all the enabled
channels.
Tip
You should disable any analog channels that are not being used to reduce the scan
time in STEP 7.
Overview of the Settling Time and Response Time of the Analog Output Modules
tA
tZ
tE
t1t2
tA = response time
tZ = cycle time corresponds to n conversion time (n = activated channels)
tE = settling time
t1 = new output value is present
t2 = output value transferred and converted
t3 = specified output value reached
t3
Figure 5-6 Settling and Response Times of the Analog Output Channels
Settling Time
The settling time (t2 to t3) – in other words, the time elapsing from application the
converted value until the specified value is reached at the analog output – is
load-dependent. A distinction is made between resistive, capacitive and inductive
loads.
For the settling times of the different analog output modules as a function of load
refer to the technical specifications of the module concerned, starting at
Section 5.25.
Response Time
The response time (t1 to t3) – in other words, the time elapsing from application of
the digital output values in the internal memory until the specified value is reached
at the analog output – in a worst case scenario is the sum of the scan time and the
settling time.
You have a worst case situation if, shortly prior to the transfer of a new output
value, the analog channel has been converted and is not converted again until all
other channels are converted (cycle time).