UltraSPARC-II CPU Module

SME5224AUPA-400400 MHz CPU, 4.0 MB E-Cache

DC Characteristics [1]

Symbol

Parameter

 

Conditions

Min

Typ

Max

Units

VOH

High-level output voltage

 

VDD = Min, IOH = Max

2.4

V

VIH

High-level input voltage, PECL clocks,

 

2.28

V

 

High-level input voltage,

 

 

 

2.0

V

 

except PECL clocks

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Low-level input voltage, PECL clocks

 

1.49

V

 

Low-level input voltage,

 

 

 

0.8

V

 

except PECL clocks

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOL

Low-level output voltage

 

 

VDD = Min, IOL = Max

0.4

V

IDD

Supply current for VDD

[3]

 

VDD = Max, Freq.=Max

9.3

12.04

A

 

[2]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IDD_CORE

Supply current for VDD_CORE

[3]

VDD_CORE = Max, Freq.=Max

10.05

11.6

A

 

 

[4]

 

 

 

 

 

 

 

 

 

 

 

 

IOZ

High-impedance output current

VDD = Max, VO = 0.4V to 2.4V

30

μA

 

(Outputs without pull-ups)

 

 

-30

μA

 

 

 

 

 

 

 

 

High-impedance output current

VDD = Max, VO = VSS to VDD

250

μA

 

(Outputs with pull-ups)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

II

Input current (inputs without pull-ups)

VDD = Max, VI = VSS to VDD

± 20

μA

 

 

 

 

 

 

 

 

Input current (inputs with pull-ups)

VDD = Max, VI = VSS to VDD

-250

μA

 

 

 

 

 

 

 

 

 

IOH

High level output current

 

 

 

4

mA

IOL

Low level output current

 

 

 

8

mA

1.Note that this tables specifies the DC characteristics at the UPA 128M connector.

2.The supply current for the VDD includes the supply current for the CPU, UDB-II, and the SRAMs.

3.The typical DC current values represent the current drawn at nominal voltage with a typical, busy computing load. Variations in the device, computing load, and system implementation affect the actual current. The maximum DC current values will rarely, if ever, be exceeded running all known computing loads over the entire operating range. The maximum values are based on simulations.

4.The supply current for the VDD_CORE includes the supply current for the CPU, UDB-II, SRAMs, via the DC to DC regulator.

Module Power Consumption

This UltraSPARC-II module requires two supply voltages. The required voltages (provided to the module) for the VDD and VDD_CORE, are respectively 3.30V and 2.6V. The estimated maximum power consumption of the UltraSPARC™–II, 400 MHz CPU, 4.0 Mbyte module (SME5224AUPA-400) is 70 watts at 400 MHz.

The estimated maximum power consumption includes the CPU, the SRAMs, the clock logic and the 8 watts consumed by the DC-DC regulator.

12

Sun Microsystems, Inc

July 1999

Page 40
Image 40
Sun Microsystems SME5224AUPA-400 manual DC Characteristics