DC Characteristics [1]
Symbol | Parameter |
| Conditions | Min | Typ | Max | Units | |
VOH |
| VDD = Min, IOH = Max | 2.4 | – | – | V | ||
VIH |
| 2.28 | – | – | V | |||
|
|
|
| 2.0 | – | – | V | |
| except PECL clocks |
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||
VIL |
| – | – | 1.49 | V | |||
|
|
|
| – | – | 0.8 | V | |
| except PECL clocks |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VOL |
|
| VDD = Min, IOL = Max | – | – | 0.4 | V | |
IDD | Supply current for VDD | [3] |
| VDD = Max, Freq.=Max | – | 9.3 | 12.04 | A |
| [2] |
|
|
|
|
|
| |
|
|
|
|
|
|
|
| |
IDD_CORE | Supply current for VDD_CORE | [3] | VDD_CORE = Max, Freq.=Max | – | 10.05 | 11.6 | A | |
|
| [4] |
|
|
|
|
| |
|
|
|
|
|
|
| ||
IOZ | VDD = Max, VO = 0.4V to 2.4V | – | – | 30 | μA | |||
| (Outputs without |
|
| – | – | μA | ||
|
|
|
|
|
|
| ||
| VDD = Max, VO = VSS to VDD | – | – | 250 | μA | |||
| (Outputs with |
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||
II | Input current (inputs without | VDD = Max, VI = VSS to VDD | – | – | ± 20 | μA | ||
|
|
|
|
|
|
| ||
| Input current (inputs with | VDD = Max, VI = VSS to VDD | – | – | μA | |||
|
|
|
|
|
|
|
|
|
IOH | High level output current |
|
|
| 4 | – | – | mA |
IOL | Low level output current |
|
|
| 8 | – | – | mA |
1.Note that this tables specifies the DC characteristics at the UPA 128M connector.
2.The supply current for the VDD includes the supply current for the CPU,
3.The typical DC current values represent the current drawn at nominal voltage with a typical, busy computing load. Variations in the device, computing load, and system implementation affect the actual current. The maximum DC current values will rarely, if ever, be exceeded running all known computing loads over the entire operating range. The maximum values are based on simulations.
4.The supply current for the VDD_CORE includes the supply current for the CPU,
Module Power Consumption
This
The estimated maximum power consumption includes the CPU, the SRAMs, the clock logic and the 8 watts consumed by the
12 | Sun Microsystems, Inc | July 1999 |