SUPER MICRO Computer AS2042G72RF4, 2042G-6RF ECC Configuration, DRAM Timing Configuration

Models: AS2042G72RF4 2042G-TRF 2042G-6RF

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Chapter 7: BIOS

ECC Configuration

ECC Mode

This submenu sets the level of ECC protection. Options include Disabled, Basic, Good, Super, Max and User. Selecting User activates the other op- tion for user setting.

Note: The "Super" ECC mode dynamically sets the DRAM scrub rate so all of memory is scrubbed in 8-hours.

DRAM ECC Enable

This setting allows hardware to report and correct memory errors automati- cally, maintaining system integrity. Options are Enabled or Disabled.

DRAM Timing Configuration

DRAM Timing Config

This setting specifies the DRAM timing configuration. Options are Auto and Manual.

Memory Timing Parameters

This selects the which node's timing parameters to display. The only selection for this option is CPU Node 0.

Clock Speed Information

Clock speed information for memory is also displayed under this Northbridge Chipset Confirguration page.

IOMMU

This setting is used to disable or set the GART size in systems without AGP. Options include Enabled and Disabled.

OHCI/EHCI HC Device Functions

These settings allow you to either Enable or Disable functions for OHCI or EHCI bus devices.

USB 2.0 Controller Mode

Use this setting to configure the USB 2.0 Controller in either Hi-Speed(480 Mps) or Full Speed (12 Mps) mode.

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SUPER MICRO Computer AS2042G72RF4, 2042G-6RF, 2042G-TRF user manual ECC Configuration, DRAM Timing Configuration