Jumpers and Headers
Table 4. | Jumper Settings (Sheet 1 of 3) |
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| Jumper Name | Ref Des | Description/Settings | Default |
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| Enables 3.3 V AUX |
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| 3.3V Aux Enable | J1A1 | ||
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| Open: 3.3 V Operation Only |
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| Enable PXH |
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| Enable PXH | J2G2 | ||
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| Open: Disable |
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| Prevents the system from rebooting following |
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| No Reboot | J2G3 | a reset from Intel 6300ESB I/O Controller | Open |
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| Open: Normal |
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| Enable on SIO |
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| Enable Super I/O Chip | J2J1 | ||
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| Open: Disable |
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| Enables 5 V AUX |
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| 5V Aux Enable | J3A1 | ||
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| Open: 3.3 V Operation Only |
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| Override VRM disable if no CPU0 installed |
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| CPU0 Present Override | J2H114 | Open | |
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| Open : Normal |
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| Enable on Board video | |
| Enable Video | J4A1 | (not | |
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| Open: Disable | populated) |
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| J3J1 | LED Control | |
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| ICH WDT Output |
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| J3J2 | Reset Control | ||
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| ICH VSWING Header | J4G5 | Access to ICH VSWING pin | Open |
| Do not Install Jumper | |||
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| ICH VREF Header | J4G6 | Access to ICH VREF pin | Open |
| Do not Install Jumper | |||
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| Access to PCI SMbus |
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| Do not install Jumper |
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| PCI SMBus Header | J4H1 | 1: PCI _SMBDAT | Open |
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| 2. Ground |
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| 3. PCI_SMBCLK |
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| Access to DDR SMbus |
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| Do not install Jumper |
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| DDR SMBus Header | J4H3 | 1: DIMM _SMBDAT | Open |
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| 2. Ground |
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| 3. DIMM_SMBCLK |
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22Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual