Intel Xeon, 6300ESB ICH user manual Jumper Settings Sheet 1, Ref Des Description/Settings

Page 22

Jumpers and Headers

Table 4.

Jumper Settings (Sheet 1 of 3)

 

 

 

 

 

 

 

 

Jumper Name

Ref Des

Description/Settings

Default

 

Position

 

 

 

 

 

 

 

 

 

 

 

 

Enables 3.3 V AUX

 

 

3.3V Aux Enable

J1A1

1-2:Enable 3.3 V AUX for wake events

1-2

 

 

 

Open: 3.3 V Operation Only

 

 

 

 

 

 

 

 

 

Enable PXH

 

 

Enable PXH

J2G2

1-2:Enable

1-2

 

 

 

Open: Disable

 

 

 

 

 

 

 

 

 

Prevents the system from rebooting following

 

 

No Reboot

J2G3

a reset from Intel 6300ESB I/O Controller

Open

 

1-2:No Reboot

 

 

 

 

 

 

 

Open: Normal

 

 

 

 

 

 

 

 

 

Enable on SIO

 

 

Enable Super I/O Chip

J2J1

1-2:Enable

1-2

 

 

 

Open: Disable

 

 

 

 

 

 

 

 

 

Enables 5 V AUX

 

 

5V Aux Enable

J3A1

1-2:Enable 5 V VAUX for wake events

1-2

 

 

 

Open: 3.3 V Operation Only

 

 

 

 

 

 

 

 

 

Override VRM disable if no CPU0 installed

 

 

CPU0 Present Override

J2H114

1-2 Override

Open

 

 

 

Open : Normal

 

 

 

 

 

 

 

 

 

Enable on Board video

1-2

 

Enable Video

J4A1

1-2:Enable

(not

 

 

 

Open: Disable

populated)

 

 

 

 

 

 

 

J3J1

LED Control

1-2

 

 

1-2 : Illuminate LED CR4J1 when EDT expires

 

ICH WDT Output

 

 

 

 

 

 

 

J3J2

Reset Control

1-2

 

 

 

 

1-2 : Reset board when WDT Expires

 

 

 

 

 

 

 

 

 

 

ICH VSWING Header

J4G5

Access to ICH VSWING pin

Open

 

Do not Install Jumper

 

 

 

 

 

 

 

 

 

 

ICH VREF Header

J4G6

Access to ICH VREF pin

Open

 

Do not Install Jumper

 

 

 

 

 

 

 

 

 

 

 

 

Access to PCI SMbus

 

 

 

 

Do not install Jumper

 

 

PCI SMBus Header

J4H1

1: PCI _SMBDAT

Open

 

 

 

2. Ground

 

 

 

 

3. PCI_SMBCLK

 

 

 

 

 

 

 

 

 

Access to DDR SMbus

 

 

 

 

Do not install Jumper

 

 

DDR SMBus Header

J4H3

1: DIMM _SMBDAT

Open

 

 

 

2. Ground

 

 

 

 

3. DIMM_SMBCLK

 

 

 

 

 

 

22Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Image 22
Contents User’s Manual SeptemberContents Contents Contents Figures TablesRevision History Date Revision DescriptionProduct Overview Product ContentsRelated Documents Products Feature List Block Diagram +$&0,,+ Memory Subsystem Dimm Placement DDR2Dimm Placement DDR2 Supported Dimm Module TypesMemory Population Rules and Configurations DDR2 400 Memory Dimm OrderingSoft Off Power ButtonPlatform Management Sleep States Supported4 S3 State 2 S1 State3 S2 State 5 S4 StatePCI PM Support Platform ManagementSystem Fan Operation Processor Thermal ManagementPrecautions Equipment Required for CRB UsageDriver and OS Requirements Drivers included on CDEquipment Required for CRB Usage Windows Compatible Driver Package Contents Jumpers and Headers JumpersJumper Settings Sheet 1 Ref Des Description/SettingsJumper Settings Sheet 2 BSEL0 J4J3Jumper Settings Sheet 3 IchsmbclkBlock Diagram Power DiagramsSystem Overview Clock Block Diagram Platform ClockingPlatform Resets Platform Reset DiagramSMBus Block Diagram SMBusIRQ Routing Diagram Platform IRQ RoutingProcessor VRD Settings Sheet 1 VRD VID HeadersProcessor VRD Settings Sheet 2 Power Buttons Miscellaneous ButtonsLevel 1 Debug Port 80/BIOS Debug ProcedureLevel 1 Debug Port 80/BIOS Test Pass/Fail Criteria Cause of FailureLevel 3 Debug Voltage References Level 2 Debug Power SequenceLevel 2 Debug Power Sequence Level 3 Debug Voltage ReferencesComponent Quantity per Heatsink AssemblyComponents Requiring Heat Sink Assembly BoardProcessor Heat Sink Installation Instructions Inserting Processor in SocketInstalling the Processor Backplate Installing the Heatsink