Intel 6300ESB ICH, Xeon user manual Block Diagram

Page 9

Product Overview

—Two RS-232 serial ports from the Intel® 6300ESB I/O Controller

—Two PS/2 connectors for mouse and keyboard

—On-board VGA Video, ATI Rage Mobility* video controller

—Parallel port

•Dual Watchdog Timer

•Miscellaneous

—National LM93* for fan control and temperature/voltage monitoring

Refer to Figure 1 for complete detailed features of the Intel® Xeon™ Processor with 800 MHz system bus and Intel® E7520 and Intel® 6300ESB Customer Reference Board (CRB).

1.4Block Diagram

Figure 1. Intel® Xeon™ Processor with 800 MHz System Bus and Intel® E7520 and Intel® 6300ESB Customer Reference Board Block Diagram

ITP

PCI-X

133 MHz

Intel® Xeon

Intel® Xeon

PCI-X 100MHz

PXH

PCI-E x4

CK409B

PCI-X 66MHz

PCI 33MHz

PCI-E

PCI-E

PCI-E x8

DB800

PCI-X

PCI

Intel®

E7520

MCH

HI 1.5

Intel®

6300ESB

ICH

DDR2 400

DDR266400

LM 93

IDE

IDE

S-ATA

VGA

UART 1

UART 2

Floppy

SIO

Parallel

PS2

UART 3

S-ATA

USB 2.0

USB 2.0

USB 2.0

USB 2.0

FWH

LPC Debug

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

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Image 9

Contents September User’s ManualContents Contents Contents Tables Figures Date Revision Description Revision HistoryProduct Contents Product OverviewRelated Documents Products Feature List Block Diagram +$&0,,+ Dimm Placement DDR2 Dimm Placement DDR2Memory Subsystem Supported Dimm Module TypesDDR2 400 Memory Dimm Ordering Memory Population Rules and ConfigurationsPlatform Management Power ButtonSoft Off Sleep States Supported3 S2 State 2 S1 State4 S3 State 5 S4 StatePlatform Management PCI PM SupportProcessor Thermal Management System Fan OperationEquipment Required for CRB Usage PrecautionsDrivers included on CD Driver and OS RequirementsEquipment Required for CRB Usage Windows Compatible Driver Package Contents Jumpers Jumpers and HeadersRef Des Description/Settings Jumper Settings Sheet 1BSEL0 J4J3 Jumper Settings Sheet 2Ichsmbclk Jumper Settings Sheet 3Power Diagrams Block DiagramSystem Overview Platform Clocking Clock Block DiagramPlatform Reset Diagram Platform ResetsSMBus SMBus Block DiagramPlatform IRQ Routing IRQ Routing DiagramVRD VID Headers Processor VRD Settings Sheet 1Processor VRD Settings Sheet 2 Miscellaneous Buttons Power ButtonsLevel 1 Debug Port 80/BIOS Debug ProcedureLevel 1 Debug Port 80/BIOS Test Pass/Fail Criteria Cause of FailureLevel 2 Debug Power Sequence Level 2 Debug Power SequenceLevel 3 Debug Voltage References Level 3 Debug Voltage ReferencesComponents Requiring Heat Sink Assembly Heatsink AssemblyComponent Quantity per BoardInserting Processor in Socket Processor Heat Sink Installation InstructionsInstalling the Processor Backplate Installing the Heatsink