System Overview
5.3Platform Resets
Figure 7 depicts the reset logic for the CRB. The Intel 6300ESB I/O Controller provides most of the reset following assertion of power good and system reset. However, the glue logic within the SIO is also used to buffer reset to PXH, MCH, FWH, and IDE.
Figure 7. | Platform Reset Diagram |
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| Intel | MCH |
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| Port 80 |
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Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual | 27 |