System Overview
5.2Platform Clocking
Figure 6.
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The CRB uses one CK409B Clock Synthesizer to generate the host differential pair clocks and the | ||||||||
100 MHz differential clock to the DB800. The DB800 then generates the 100 MHz differential pair | ||||||||
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clock for the PCI Express* devices. Figure 6 shows the CRB clock configuration. | ||||||||
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Clock Block Diagram |
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%&"#! | HILAI$ |
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!! | FWH |
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| PCI Express Slot | |
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26Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual