Intel Xeon, 6300ESB ICH user manual SMBus Block Diagram

Page 28

System Overview

5.4SMBus

 

 

 

 

￿

 

 

￿￿￿￿￿￿￿

 

 

Figure 8 below illustrates the routing of the SMBus signal among the components.

Figure 8.

SMBus Block Diagram

 

 

 

 

 

 

 

￿￿￿￿￿￿￿

Intel

 

6300ESB I/O

 

 

 

 

Controller Hub

 

PCI-X 133 MHz

 

 

￿￿￿￿￿￿￿

 

 

￿￿￿￿￿￿￿￿￿￿

Slot (Slot #1)

 

 

 

 

 

 

 

 

 

 

 

 

PCI-X 100 MHz

 

 

 

 

 

LM 93

Slot (Slot #2)

 

 

SMBus￿￿￿￿

￿￿￿￿

 

￿￿

 

PCI-X 100 MHz

 

 

￿Repeater￿

 

 

 

 

ITP-XDP

 

 

 

Slot (Slot #3)

 

SMBus

 

 

 

 

 

 

PCI Express

 

Master Only

 

 

 

 

 

 

Slot (Slot #4)

 

Intel￿E7520

 

 

 

 

 

 

PCI Express

 

Chipset

 

SMBus

 

 

 

 

Slot (Slot #5)

 

 

 

Repeater

 

 

 

 

 

 

PXH-D

 

 

 

 

 

 

PCI-X 66 MHz

 

 

 

 

 

 

 

 

 

￿￿￿￿

 

 

DIMM #A1

DIMM #B1

Slot (Slot #6)

 

 

 

 

 

 

 

 

 

 

 

 

￿￿￿

 

 

Addr 0xA0

Addr 0xA8

PCI-X 66 MHz

 

 

 

 

 

 

 

CK409B

 

 

 

 

 

 

 

 

 

 

 

 

 

Slot (Slot #7)

 

 

 

 

 

DIMM #A2

DIMM #B2

PCI 32-bit /

 

DB800

 

 

 

Addr 0xA2

Addr 0xAA

 

 

 

 

33 MHz (Slot #8)

 

 

 

 

 

 

 

 

 

 

 

 

DDR CH A

DDR CH B

￿￿￿￿￿￿￿￿

28Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Image 28
Contents User’s Manual SeptemberContents Contents Contents Figures TablesRevision History Date Revision DescriptionProduct Overview Product ContentsRelated Documents Products Feature List Block Diagram +$&0,,+ Dimm Placement DDR2 Dimm Placement DDR2Memory Subsystem Supported Dimm Module TypesMemory Population Rules and Configurations DDR2 400 Memory Dimm OrderingPower Button Platform ManagementSoft Off Sleep States Supported2 S1 State 3 S2 State4 S3 State 5 S4 StatePCI PM Support Platform ManagementSystem Fan Operation Processor Thermal ManagementPrecautions Equipment Required for CRB UsageDriver and OS Requirements Drivers included on CDEquipment Required for CRB Usage Windows Compatible Driver Package Contents Jumpers and Headers JumpersJumper Settings Sheet 1 Ref Des Description/SettingsJumper Settings Sheet 2 BSEL0 J4J3Jumper Settings Sheet 3 IchsmbclkBlock Diagram Power DiagramsSystem Overview Clock Block Diagram Platform ClockingPlatform Resets Platform Reset DiagramSMBus Block Diagram SMBusIRQ Routing Diagram Platform IRQ RoutingProcessor VRD Settings Sheet 1 VRD VID HeadersProcessor VRD Settings Sheet 2 Power Buttons Miscellaneous ButtonsDebug Procedure Level 1 Debug Port 80/BIOSLevel 1 Debug Port 80/BIOS Test Pass/Fail Criteria Cause of FailureLevel 2 Debug Power Sequence Level 2 Debug Power SequenceLevel 3 Debug Voltage References Level 3 Debug Voltage ReferencesHeatsink Assembly Components Requiring Heat Sink AssemblyComponent Quantity per BoardProcessor Heat Sink Installation Instructions Inserting Processor in SocketInstalling the Processor Backplate Installing the Heatsink