|
|
|
|
|
|
|
|
| Jumpers and Headers | ||
Table 4. | Jumper Settings (Sheet 2 of 3) |
|
|
|
|
|
|
| |||
|
|
|
|
|
|
|
|
|
|
|
|
| Jumper Name | Ref Des | Description/Settings | Default |
| ||||||
| Position |
| |||||||||
|
|
|
|
|
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
|
| |
|
|
|
|
| BSEL0 |
| BSEL1 |
| SPEED |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Normal |
|
| ||
| FSB Clock Frequency |
|
|
|
|
|
|
|
| ||
| BSEL1: J4H4 |
|
| RSVD | BSEL0: |
| |||||
|
| Override |
|
|
| ||||||
|
| BSEL0: J4J3 |
|
|
|
|
| BSEL1: |
| ||
| (Host Clock Jumpers) |
| Open |
| 133 MHz |
| |||||
|
|
|
|
|
|
|
|
| |||
|
|
|
|
| Open |
| Open |
| 167 MHz |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Open |
|
| 200 MHz |
|
| |
|
|
|
|
|
|
|
|
|
|
| |
|
| SMI Inject | J4H5 | Inject SMI Signal |
| Open |
| ||||
|
| Do Not Install Jumper |
|
| |||||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
|
| |||
| FORCEPR0 inject | J4H6 | Inject FORCEPR0 Signal |
| Open |
| |||||
| Do Not Install Jumper |
|
| ||||||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
|
| |||
| STPCLK Inject | J4J1 | Inject STPCLK Signal |
| Open |
| |||||
| Do Not Install Jumper |
|
| ||||||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
|
| |||
| FORCEPR1 inject | J4J2 | Inject FORCEPR1 Signal |
| Open |
| |||||
| Do Not Install Jumper |
|
| ||||||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
| Override VRM disable if CPU1 is not present |
|
| ||||
| CPU1 Present Override | J4J5 |
|
|
| Open |
| ||||
|
|
|
|
| Open: Normal |
|
|
|
|
| |
|
|
|
|
|
|
|
| ||||
|
|
|
|
| Override VRM disable if BSELs do not match |
|
| ||||
| BSEL Match Override | J4J7 |
|
|
| Open |
| ||||
|
|
|
|
| Open: Normal |
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
| ||
|
|
|
|
|
|
|
|
|
| ||
|
| CPU1 VID | J4K1 |
|
|
| As |
| |||
|
|
|
|
| Required |
| |||||
|
|
|
|
|
|
|
|
| |||
|
|
|
|
|
|
|
|
|
| ||
|
|
|
|
|
|
|
|
|
| ||
|
|
|
|
|
|
|
|
| |||
|
|
|
|
| Manual VID select |
|
|
| |||
| CPU1 VID Override | J4K2 |
| Open |
| ||||||
|
|
|
|
| Open: CPU select |
|
|
| |||
|
|
|
|
|
|
|
|
| |||
|
|
|
|
| Access to MCH SMbus |
|
|
| |||
|
|
|
|
| Do not install Jumper |
|
|
| |||
| MCH SMBus Header | J5D3 | 1: MCH _SMBDAT |
| Open |
| |||||
|
|
|
|
| 2. Ground |
|
|
|
|
| |
|
|
|
|
| 3. MCH_SMBCLK |
|
|
| |||
|
|
|
|
|
|
|
| ||||
|
|
| PLLS0 | J5E112 | See MCH Documentation for alternative Gear | Short |
| ||||
|
|
| Ratios for MCH FSB/Memory |
|
| ||||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
| ||||
| Intel | ® | 6300ESB I/O |
| Intel 6300ESB I/O Controller Top Swap |
|
| ||||
|
|
|
|
|
|
|
| ||||
| Controller Top Swap (FWH | J5F1 |
|
|
| Open |
| ||||
| Memory Swap) |
| Open: Normal |
|
|
|
|
| |||
|
|
|
|
|
|
|
|
|
| ||
|
|
|
|
|
|
|
| ||||
|
|
| PLLS1 | J5F113 | See MCH Documentation for alternative Gear | Short |
| ||||
|
|
| Ratios for MCH FSB/Memory |
|
| ||||||
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
|
|
|
|
|
Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual | 23 |