Intel 80219 specifications MCU supports a page size of 2 Kbytes for 64-bit mode

Intel® 80219 General Purpose PCI Processor

Non-Core Errata

6.The MTTR1 (Core Multi-Transaction Timer) is not operating due to improper behavior of the core internal bus request signal (REQ#)

Problem:	The MTTR1 (Core Multi-Transaction Timer) is not operating due to improper behavior of the core
	internal bus request signal (REQ#). All agents on the bus, except the core, maintain their assertion
	on REQ# signals upon receiving a retry. When the MCU is busy this means that the core must wait
	for other agents to complete their transactions before the core gains access to memory. Due to the
	fact that internal bus agents initiate larger transactions than the core, this issue results in an
	unbalanced access to the internal bus biased to these other agents (DMA, ATU, etc.). When opera-
	tional, the MTTR1 is intended to correct this balance. See Section 11.2.2 of the Intel® 80219
	General Purpose PCI Processor Developer’s Manual for more information on the MTTR1
	function.
Implication:	In the case of the MCU internal bus target, this problem is compounded by the many internal bus
	retries that are issued by the MCU when under heavily loaded conditions. The result is that the
	internal bus arbiter removes the core access to the bus when the core deasserts REQ#. This
	condition may result in the core being locked out of accessing the MCU until other internal bus
	agents have completed their transaction(s) (i.e., when the DMA is in the process of a large block
	transfer of data, the core may have to wait until the DMA transaction is completed before it would
	have access to the internal bus to initiate its transaction).
Workaround:	No workaround.
Status:	NoFix.

7.The MCU supports a page size of 2 Kbytes for 64-bit mode

Problem:	The Intel® 80219 General Purpose PCI Processor Developer’s Manual (Section 6.1.1 and Section
	6.2.2.3) states that the MCU supports a page size of 4 Kbytes for 64-bit mode and 2 Kbytes for
	32-bit mode. This is in error.
Implication:	The MCU supports a page size of 2 Kbytes for 64-bit mode and for 32-bit mode.
Workaround:	No workaround.
Status:	NoFix.

22 Specification Update