SUPER MICRO Computer I2DMR-8G2 user manual Chipset Overview, Major bus groups are

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SUPER i2DMR-8G2/i2DMR-iG2 User's Manual

1-2 Chipset Overview

Built upon the functionality and the capability of the Intel E8870 (870) chipset, the i2DMR-8G2/i2DMR-iG2 motherboard provides the performance and feature set required for high-end server platforms with configuration options optimized for communications, presentation, storage, computation or database applications. The Intel E8870 chipset consists of the following four primary components: the Scalable Node Controller (SNC), Server I/O Hub (SIOH), the Memory Repeater Hub for Synchronous Double Data Rate Memory(MRH_D) and Scalability Port Switch (SPS) (*Note Below). Comple- mentary components include the I/O Hub Controller (Intel ICH4), the Firm- ware Hub (FWH), and the PCI Bus Bridge (P64H2).

The major bus groups are:

Processor system bus: supporting up to two processors and one Scalable Node Controller (SNC), with a maximum operating frequency of 200 MHz@400 MT/s.

Rambus and SNC Interface: the Interconnection between the SNC and Memory Repeater Hub (MRH-D), operating at a maximum frequency of 400 MHz.

Synchronous DDR Interface: interface between the MRH-D and up to four DIMM sockets, operating at the operating clock frequency of 100 MHz per branch channel.

Scalability Port (SP) Interface: a 400MHz, double-pumped, simultaneous bi- directional signaling (SBD) interface.

Hub Interface 2.0: interface between the SIOH and the P64H2 using 266 MHz strobes on a 16-bit wide data bus.

Hub Interface 1.5: interface between the SIOH and the ICH4 using 133 MHz strobes on a 8-bit wide data bus.

Local Firmware Hub (LPC): Interface between the SNC and local firmware.

System Management Bus (SMBus): a subset of the I2C serial bus integrated into the SNC, SPS, and SIOH.

(*Note: The Scalability Port Switch-SPS is not used in the i2DMR-8G2/iG2.)

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Contents Super Page About This Manual Manual OrganizationTable of Contents Troubleshooting Table of ContentsBios AppendicesChecklist OverviewContacting Supermicro HeadquartersEurope Asia-PacificSuper i2DMR-8G2/i2DMR-iG2 Image Super i2DMR-8G2/i2DMR-iG2 Motherboard Layout Connector Description Jumper Description Default SettingQuick Reference i2DMR-8G2/i2DMR-iG2 Motherboard Features ChipsetM o r y Expansion SlotsAcpi Features PC Health MonitoringThermal Control Onboard I/ODimensions OtherBlock Diagram of the i2DMR-8G2/i2DMR-iG2 Motherboard Chipset Overview Major bus groups arePC Health Monitoring Special FeaturesComplementary Components include Acpi Features Power SupplyAuto-Switching Voltage Regulator for the CPU Core CPU Overheat LED and ControlSuper I/O Page Static-Sensitive Devices PrecautionsUnpacking Itanium2 Processor and Heatsink Installation Locating the components included in the shipping packageInstallation Installing Motherboard into chassis Installation Installing and securing the Power Pod onto the Itanium Edge Connector Signal PinsPage Installing the Heatsink on the CPU*for CPU w/o Heatsink only Connecting AC Power to the motherboard and the Power Pods Dimm Installation Installing DIMMsMemory Support I/OPorts/Control Panel Connectors I/O Port Locations and DefinitionsSpeaker Connector CN4 Front Control Panel U66Connecting Cables HDD LED Overheat LED OHPower Button Reset ButtonUniversal Serial Bus USB0/1, USB2/3 Front Panel Universal Serial Bus Header Serial PortsGlan Ports Ethernet Chassis IntrusionSpeaker Header Fan HeadersWake-On-Ring Connector Power FaultAlarm Reset SMB Power I2 CJumper Settings Glan Enable/DisableExplanation Jumpers Cmos ClearVGA Enable/Disable Scsi Enable/Disable *i2DMR-8G2 onlyScsi Termination Enable/ Disable *i2DMR-8G2 only Watch DogForce-Power-On Enable Disable Onboard IndicatorsGlan LEDs COM Port, IDE, Ipmi and Scsi Connections IDE ConnectorsCOM Port 1 J5 & COM Header J38 Ultra 320 Scsi Connectors *i2DMR-8G2 only IpmiPage Before Power On Troubleshooting ProceduresNo Power Memory Errors Losing the System’s Setup ConfigurationNo Video Technical Support Procedures Frequently Asked QuestionsReturning Merchandise for Service Amibios IntroductionMain Setup Language MenuBSP Information System Time/System DateSuper IO Configuration Sub Menu Advanced Bios SetupSetup Warning IDE Configurations Sub Menu Serial Port1 Address/Serial Port2 AddressType LBA/Large ModeBlock Multi-Sector Transfer DMA Mode A.R.T. For Hard disk drives32Bit Data Transfer Armd Emulation TypeBios Settings Configuration Quiet BootAtapi Detect Time Out Atapi 80Pin Cable DetectionSystem Health Monitor Advanced System HealthPeripheral Device Configuration Power Loss ControlWatch Dog Timer Watch Dog Timer ValueUSB Function UBS ConfigurationLegacy USB Support PCI/PnP Configuration PCI Latency TimerAllocate IRQ to PCI VGA PCI IDE BusMasterSecurity Settings Load Optimal Defaults Load Fail-Safe DefaultsExit Options Exit Saving ChangesDiscarding Changes Introduction to the EFI Platform Flash AMI Bios Page Page Page Brief instruction for adding the Cdrom boot option in EFI Software Installation Page IA-32 Post Codes Checkpoint Code DescriptionRegister for date and time next Monochrome mode and color mode settings next 47h 60h 95h Common Debug Codes Checkpoints Code DescriptionSuper i2DMR-8G2/i2DMR-iG2 User’s Manual