SUPER MICRO Computer I2DMR-8G2 user manual 95h

Page 76

SUPER i2DMR-8G2/i2DMR-iG2 User’s Manual

Checkpoint

Code Description

95h

Initializing the bus option ROMs from C800 next. See the last page of

 

this chapter for additional information.

96h

Initializing before passing control to the adaptor ROM at C800.

97h

Initialization before the C800 adaptor ROM gains control has com-

 

pleted. The adaptor ROM check is next.

98h

The adaptor ROM had control and has now returned control to BIOS

 

POST. Performing any required processing after the option ROM

 

returned control.

99h

Any initialization required after the option ROM test has completed.

 

Configuring the timer data area and printer base address next.

9Ah

Set the timer and printer base addresses. Setting the RS-232 base

 

address next.

9Bh

Returned after setting the RS-232 base address. Performing any

 

required initialization before the Coprocessor test next.

9Ch

Required initialization before the Coprocessor test is over. Initializing

 

the Coprocessor next.

9Dh

Coprocessor initialized. Performing any required initialization after

 

the Coprocessor test next.

9Eh

Initialization after the Coprocessor test is complete. Checking the

 

extended keyboard, keyboard ID, and Num Lock key next. Issuing the

 

keyboard ID command next.

A2h

Displaying any soft errors next.

A3h

The soft error display has completed. Setting the keyboard typematic

 

rate next.

A8h

Initialization before passing control to the adaptor ROM at E000h

 

completed. Passing control to the adaptor ROM at E000h next.

A9h

Returned from adaptor ROM at E000h control. Performing any

 

initialization required after the E000 option ROM had control next.

Aah

Initialization after E000 option ROM control has completed. Displaying

 

the system configuration next.

B0h

The system configuration is displayed.

B1h

Copying any code to specific areas.

00h

Code copying to specific areas is done. Passing control to EFI.

A-6

Image 76
Contents Super Page About This Manual Manual OrganizationTable of Contents Troubleshooting Table of ContentsBios AppendicesChecklist OverviewContacting Supermicro HeadquartersEurope Asia-PacificSuper i2DMR-8G2/i2DMR-iG2 Image Super i2DMR-8G2/i2DMR-iG2 Motherboard Layout Connector Description Jumper Description Default SettingQuick Reference i2DMR-8G2/i2DMR-iG2 Motherboard Features ChipsetM o r y Expansion SlotsAcpi Features PC Health MonitoringThermal Control Onboard I/ODimensions OtherBlock Diagram of the i2DMR-8G2/i2DMR-iG2 Motherboard Chipset Overview Major bus groups arePC Health Monitoring Special FeaturesComplementary Components include Acpi Features Power SupplyAuto-Switching Voltage Regulator for the CPU Core CPU Overheat LED and ControlSuper I/O Page Static-Sensitive Devices PrecautionsUnpacking Itanium2 Processor and Heatsink Installation Locating the components included in the shipping packageInstallation Installing Motherboard into chassis Installation Installing and securing the Power Pod onto the Itanium Edge Connector Signal PinsPage Installing the Heatsink on the CPU*for CPU w/o Heatsink only Connecting AC Power to the motherboard and the Power Pods Dimm Installation Installing DIMMsMemory Support I/OPorts/Control Panel Connectors I/O Port Locations and DefinitionsSpeaker Connector CN4 Front Control Panel U66Connecting Cables HDD LED Overheat LED OHPower Button Reset ButtonUniversal Serial Bus USB0/1, USB2/3 Front Panel Universal Serial Bus Header Serial PortsGlan Ports Ethernet Chassis IntrusionSpeaker Header Fan HeadersWake-On-Ring Connector Power FaultAlarm Reset SMB Power I2 CJumper Settings Glan Enable/DisableExplanation Jumpers Cmos ClearVGA Enable/Disable Scsi Enable/Disable *i2DMR-8G2 onlyScsi Termination Enable/ Disable *i2DMR-8G2 only Watch DogForce-Power-On Enable Disable Onboard IndicatorsGlan LEDs COM Port, IDE, Ipmi and Scsi Connections IDE ConnectorsCOM Port 1 J5 & COM Header J38 Ultra 320 Scsi Connectors *i2DMR-8G2 only IpmiPage Before Power On Troubleshooting ProceduresNo Power Memory Errors Losing the System’s Setup ConfigurationNo Video Technical Support Procedures Frequently Asked QuestionsReturning Merchandise for Service Amibios IntroductionMain Setup Language MenuBSP Information System Time/System DateSuper IO Configuration Sub Menu Advanced Bios SetupSetup Warning IDE Configurations Sub Menu Serial Port1 Address/Serial Port2 AddressType LBA/Large ModeBlock Multi-Sector Transfer DMA Mode A.R.T. For Hard disk drives32Bit Data Transfer Armd Emulation TypeBios Settings Configuration Quiet BootAtapi Detect Time Out Atapi 80Pin Cable DetectionSystem Health Monitor Advanced System HealthPeripheral Device Configuration Power Loss ControlWatch Dog Timer Watch Dog Timer ValueUSB Function UBS ConfigurationLegacy USB Support PCI/PnP Configuration PCI Latency TimerAllocate IRQ to PCI VGA PCI IDE BusMasterSecurity Settings Load Optimal Defaults Load Fail-Safe DefaultsExit Options Exit Saving ChangesDiscarding Changes Introduction to the EFI Platform Flash AMI Bios Page Page Page Brief instruction for adding the Cdrom boot option in EFI Software Installation Page IA-32 Post Codes Checkpoint Code DescriptionRegister for date and time next Monochrome mode and color mode settings next 47h 60h 95h Common Debug Codes Checkpoints Code DescriptionSuper i2DMR-8G2/i2DMR-iG2 User’s Manual