Cypress Document History Page, CY7C1511JV18, CY7C1526JV18 CY7C1513JV18, CY7C1515JV18, Ecn No

CY7C1511JV18, CY7C1526JV18

CY7C1513JV18, CY7C1515JV18

Document History Page

Document Title: CY7C1511JV18/CY7C1526JV18/CY7C1513JV18/CY7C1515JV18, 72-Mbit QDR™-II SRAM 4-Word

Burst Architecture

Document Number: 001-12560

REV.	ECN NO.	ISSUE	ORIG. OF	DESCRIPTION OF CHANGE
		DATE	CHANGE
**	808457	See ECN	VKN	New data sheet
*A	1273951	See ECN	VKN	Removed tSD footnote
*B	1462588	See ECN	VKN/AESA	Converted from preliminary to final
				Removed 250MHz and 200MHz
				Updated IDD/ISB specs
				Changed DLL minimum operating frequency from 80MHz to 120MHz
				Changed tCYC max spec to 8.4ns
*C	2189567	See ECN	VKN/AESA	Minor Change-Moved to the external web

© Cypress Semiconductor Corporation, 2007-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document Number: 001-12560 Rev. *C Revised March 10, 2008 Page 27 of 27

QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All product and company names mentioned in this document are the trademarks of their respective holders.

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