Cypress CY7C1550V18, CY7C1548V18, CY7C1546V18, CY7C1557V18 manual AC Test Loads and Waveforms

Page 22

CY7C1546V18, CY7C1557V18

CY7C1548V18, CY7C1550V18

AC Test Loads and Waveforms

Figure 4. AC Test Loads and Waveforms

VREF = 0.75V

VREF

0.75V

OUTPUT

Z0 = 50Ω

Device

Under

Test

RQ =

250Ω

(a)

RL = 50Ω

VREF = 0.75V

VREF

0.75V

R = 50Ω

OUTPUT

ALL INPUT PULSES[21]

1.25V

Device

5 pF 0.25V

0.75V

Under

Slew Rate = 2 V/ns

Test

RQ =

250Ω

INCLUDING

JIG AND

(b)

SCOPE

Note

21.Unless otherwise noted, test conditions assume signal transition time of 2V/ns, timing reference levels of 0.75V, VREF = 0.75V, RQ = 250Ω, VDDQ = 1.5V, input pulse levels of 0.25V to 1.25V, output loading of the specified IOL/IOH, and load capacitance shown in (a) of AC Test Loads and Waveforms.

Document Number: 001-06550 Rev. *E

Page 22 of 28

[+] Feedback

Image 22

Contents Functional Description FeaturesConfigurations Selection GuideLogic Block Diagram CY7C1546V18 Logic Block Diagram CY7C1557V18Logic Block Diagram CY7C1548V18 Logic Block Diagram CY7C1550V18CY7C1546V18 8M x Pin ConfigurationBall Fbga 15 x 17 x 1.4 mm Pinout CY7C1557V18 8M xCY7C1548V18 4M x CY7C1550V18 2M xBWS BWS2, BWS3 Pin DefinitionsPin Name Pin Description Synchronous Read or Write Input. WhenTDO for Jtag Power Supply Inputs to the Core of the DevicePower Supply Inputs for the Outputs of the Device TCK Pin for JtagFunctional Overview Echo Clocks Valid Data Indicator QvldApplication Example SRAM#1 SRAM#2BWS0 BWS1 Write Cycle DescriptionsOperation CommentsBWS0 BWS0 BWS1 BWS2 BWS3Ieee 1149.1 Serial Boundary Scan Jtag Idcode TAP Controller State Diagram State diagram for the TAP controller followsTDI TAP Controller Block DiagramTAP Electrical Characteristics TCKTAP AC Switching Characteristics TAP Timing and Test ConditionsInstruction Codes Identification Register DefinitionsScan Register Sizes Register Name Bit SizeBit Number Bump ID Power Up Sequence Power Up Sequence in DDR-II+ SramPower Up Waveforms DLL ConstraintsMaximum Ratings Electrical CharacteristicsDC Electrical Characteristics Range AmbientThermal Resistance AC Electrical CharacteristicsCapacitance Parameter Description Test Conditions Max UnitAC Test Loads and Waveforms AC Test Loads and WaveformsParameter Min Max Switching CharacteristicsCypress Consortium Description 375 MHz 333 MHz 300 MHz Unit DLL TimingNOP Switching WaveformsRead/Write/Deselect Sequence 29, 30, 31 Read NOP WriteOrdering Information 300 Package Diagram Ball Fbga 15 x 17 x 1.4 mmDocument History ECN No Issue Orig. Description of Change DateREV