Cypress CY7C68053 manual Slave Fifo Asynchronous Write, Slave Fifo Synchronous Packet End Strobe

CY7C68053

9.6Slave FIFO Asynchronous Write

Figure 9-5. Slave FIFO Asynchronous Write Timing Diagram[17]

SLWR/SLCS#

DATA

FLAGS

tWRpwh

tWRpwl

t SFD tFDH

tXFD

Table 9-8. Slave FIFO Asynchronous Write Parameters with Internally Sourced IFCLK[20]

Parameter	Description	Min.	Max.	Unit
tWRpwl	SLWR Pulse LOW	50		ns
tWRpwh	SLWR Pulse HIGH	70		ns
tSFD	SLWR to FIFO DATA Set-up Time	10		ns
tFDH	FIFO DATA to SLWR Hold Time	10		ns
tXFD	SLWR to FLAGS Output Propagation Delay		70	ns

9.7Slave FIFO Synchronous Packet End Strobe

Figure 9-6. Slave FIFO Synchronous Packet End Strobe Timing Diagram[17]

IFCLK

PKTEND

FLAGS

tPEH

tSPE

tXFLG

Table 9-9. Slave FIFO Synchronous Packet End Strobe Parameters with Internally Sourced IFCLK[10]

Parameter	Description	Min.	Max.	Unit
tIFCLK	IFCLK Period	20.83		ns
tSPE	PKTEND to Clock Set-up Time	14.6		ns
tPEH	Clock to PKTEND Hold Time	0		ns
tXFLG	Clock to FLAGS Output Propagation Delay		9.5	ns
Table 9-10. Slave FIFO Synchronous Packet End Strobe Parameters with Externally Sourced IFCLK[10]
Parameter	Description	Min.	Max.	Unit
tIFCLK	IFCLK Period	20.83	200	ns
tSPE	PKTEND to Clock Set-up Time	8.6		ns
tPEH	Clock to PKTEND Hold Time	3.04		ns
tXFLG	Clock to FLAGS Output Propagation Delay		13.5	ns
Document # 001-06120 Rev *F				Page 29 of 39

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