Cypress CY7C65113C manual Instruction Set Summary, Mnemonic, Operand Opcode Cycles

Page 10

CY7C65113C

Table 4-2. I/O Register Summary (continued)

Register Name

I/O Address

Read/Write

Function

Page

 

 

 

 

 

Hub Port Control (Ports [4:1])

0x4B

R/W

Hub Downstream Ports Control (Ports [4:1])

31

 

 

 

 

 

Hub Port Suspend

0x4D

R/W

Hub Downstream Port Suspend Control

32

 

 

 

 

 

Hub Port Resume Status

0x4E

R

Hub Downstream Ports Resume Status

33

 

 

 

 

 

Hub Ports SE0 Status

0x4F

R

Hub Downstream Ports SE0 Status

31

 

 

 

 

 

Hub Ports Data

0x50

R

Hub Downstream Ports Differential Data

32

 

 

 

 

 

Hub Downstream Force Low

0x51

R/W

Hub Downstream Ports Force LOW (Ports [1:4])

31

 

 

 

 

 

Processor Status & Control

0xFF

R/W

Microprocessor Status and Control Register

23

 

 

 

 

 

4.3Instruction Set Summary

Refer to the CYASM Assembler User’s Guide for more details. Note that conditional jump instructions (i.e., JC, JNC, JZ, JNZ) take five cycles if jump is taken, four cycles if no jump.

Table 4-3. Instruction Set Summary

MNEMONIC

operand

opcode

cycles

HALT

 

00

7

 

 

 

 

ADD A,expr

data

01

4

 

 

 

 

ADD A,[expr]

direct

02

6

 

 

 

 

ADD A,[X+expr]

index

03

7

 

 

 

 

ADC A,expr

data

04

4

 

 

 

 

ADC A,[expr]

direct

05

6

 

 

 

 

ADC A,[X+expr]

index

06

7

 

 

 

 

SUB A,expr

data

07

4

 

 

 

 

SUB A,[expr]

direct

08

6

 

 

 

 

SUB A,[X+expr]

index

09

7

 

 

 

 

SBB A,expr

data

0A

4

 

 

 

 

SBB A,[expr]

direct

0B

6

 

 

 

 

SBB A,[X+expr]

index

0C

7

 

 

 

 

OR A,expr

data

0D

4

 

 

 

 

OR A,[expr]

direct

0E

6

 

 

 

 

OR A,[X+expr]

index

0F

7

 

 

 

 

AND A,expr

data

10

4

 

 

 

 

AND A,[expr]

direct

11

6

 

 

 

 

AND A,[X+expr]

index

12

7

 

 

 

 

XOR A,expr

data

13

4

 

 

 

 

XOR A,[expr]

direct

14

6

 

 

 

 

XOR A,[X+expr]

index

15

7

 

 

 

 

CMP A,expr

data

16

5

 

 

 

 

CMP A,[expr]

direct

17

7

 

 

 

 

CMP A,[X+expr]

index

18

8

 

 

 

 

MOV A,expr

data

19

4

 

 

 

 

MOV A,[expr]

direct

1A

5

 

 

 

 

MOV A,[X+expr]

index

1B

6

 

 

 

 

MOV X,expr

data

1C

4

 

 

 

 

MOV X,[expr]

direct

1D

5

 

 

 

 

reserved

 

1E

 

 

 

 

 

Document #: 38-08002 Rev. *D

MNEMONIC

operand

opcode

cycles

NOP

 

20

4

 

 

 

 

INC A

acc

21

4

 

 

 

 

INC X

x

22

4

 

 

 

 

INC [expr]

direct

23

7

 

 

 

 

INC [X+expr]

index

24

8

 

 

 

 

DEC A

acc

25

4

 

 

 

 

DEC X

x

26

4

 

 

 

 

DEC [expr]

direct

27

7

 

 

 

 

DEC [X+expr]

index

28

8

 

 

 

 

IORD expr

address

29

5

 

 

 

 

IOWR expr

address

2A

5

 

 

 

 

POP A

 

2B

4

 

 

 

 

POP X

 

2C

4

 

 

 

 

PUSH A

 

2D

5

 

 

 

 

PUSH X

 

2E

5

 

 

 

 

SWAP A,X

 

2F

5

 

 

 

 

SWAP A,DSP

 

30

5

 

 

 

 

MOV [expr],A

direct

31

5

 

 

 

 

MOV [X+expr],A

index

32

6

 

 

 

 

OR [expr],A

direct

33

7

 

 

 

 

OR [X+expr],A

index

34

8

 

 

 

 

AND [expr],A

direct

35

7

 

 

 

 

AND [X+expr],A

index

36

8

 

 

 

 

XOR [expr],A

direct

37

7

 

 

 

 

XOR [X+expr],A

index

38

8

 

 

 

 

IOWX [X+expr]

index

39

6

 

 

 

 

CPL

 

3A

4

 

 

 

 

ASL

 

3B

4

 

 

 

 

ASR

 

3C

4

 

 

 

 

RLC

 

3D

4

 

 

 

 

RRC

 

3E

4

 

 

 

 

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Contents USB Hub with Microcontroller Cypress Semiconductor CorporationCY7C65113C 18.0 16.017.0 19.0List of Tables Features I2C Functional OverviewGpio USBLogic Block Diagram Pin Assignments Pin ConfigurationsProduct Summary Tables Top View CY7C65113C 28-pin SoicI/O Register Summary Mnemonic Instruction Set SummaryInstruction Set Summary Operand Opcode CyclesProgramming Model 14-bit Program CounterProgram Memory begins here KB -32 Prom ends here CY7C65113C8-bit Temporary Register 8-bit Accumulator a8-bit Program Stack Pointer PSP Address Modes 8-bit Data Stack Pointer DSPMOV A, Dspinit Xtalout Power-on ResetClocking XtalinSuspend Mode Watchdog ResetPort 0,1 Low Isink General-purpose I/O PortsPort 0 Data Address Gpio Configuration Port Gpio Configuration AddressGpio Interrupt Enable Ports 10.0 12-bit Free-Running TimerPort 0 Interrupt Enable Timer MSB Address 11.0 I2C Configuration RegisterTimer LSB Address 2C Configuration Address2C Status and Control Address 12.0 I2C-compatible ControllerI2C Data Address ACKContinue/Busy Write 1 to indicate ready for next transaction Processor Status and Control Address 0xFF Processor Status and Control RegisterIRQ USB Endpoint Interrupt Enable Address Global Interrupt Enable Register AddressInterrupts Interrupt Controller Function Diagram Interrupt VectorsTimer Interrupt USB Bus Reset InterruptInterrupt Latency Gpio Interrupt USB Endpoint InterruptsUSB Hub Interrupt 14.8 I2C InterruptUSB Enumeration USB OverviewUSB Serial Interface Engine SIE ACK/NAK/STALLUSB Hub Connecting/Disconnecting a USB DeviceHub Ports Connect Status Enabling/Disabling a USB Device Hub Ports Enable Register AddressHub Ports Enable Register Hub Downstream Ports Status and ControlHub Ports Force Low Hub Downstream Ports Control Register Address 0x4BHub Ports SE0 Status Address 0x4F Hub Ports Data Register Downstream Port Suspend and ResumeHub Ports Data Hub Ports Suspend Address 0x4DHub Ports Resume Address 0x4E USB Upstream Port Status and ControlUSB Status and Control Address 0x1F USB Device Endpoints USB Serial Interface Engine OperationUSB Device Addresses USB Device Address Device A, B Addresses 0x10A and 0x40BUSB Device Endpoint Zero Mode A0, B0 USB Control Endpoint Mode RegistersSize Label Start Address USB Endpoint Counter Registers USB Non-control Endpoint Mode RegistersUSB Non-control Device Endpoint Mode StallSetup Endpoint Mode/Count Registers Update and Locking MechanismUpdate Set Update only if Fifo is WrittenData Data SetUSB Mode Tables Setup OUTDtog Dval Count Dtog Dval Count Endpoint Register Summary PortsLOW Sample Schematic Absolute Maximum RatingsUSB Interface Electrical CharacteristicsParameter Description Conditions Min Max Unit General Upstream/Downstream PortTimer Signals Switching Characteristics fOSC = 6.0 MHzUSB Full-speed Signaling10 Parameter Description Min Max Unit Clock SourceOrdering Code Prom Size Package Type Operating Range Package DiagramOrdering Information CY7C65113C-SXCTDocument History Issue Date Orig. Description of ChangeREV ECN no