Cypress CY7C65113C manual Interrupt Latency, USB Bus Reset Interrupt, Timer Interrupt

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CY7C65113C

Although Reset is not an interrupt, the first instruction executed after a reset is at PROM address 0x0000h—which corresponds to the first entry in the Interrupt Vector Table. Because the JMP instruction is two bytes long, the interrupt vectors occupy two bytes.

Table 14-1. Interrupt Vector Assignments

Interrupt Vector Number

ROM Address

Function

Not Applicable

0x0000

Execution after Reset begins here

 

 

 

1

0x0002

USB Bus Reset interrupt

 

 

 

2

0x0004

128-s timer interrupt

 

 

 

3

0x0006

1.024-ms timer interrupt

 

 

 

4

0x0008

USB Address A Endpoint 0 interrupt

 

 

 

5

0x000A

USB Address A Endpoint 1 interrupt

 

 

 

6

0x000C

USB Address A Endpoint 2 interrupt

 

 

 

7

0x000E

USB Address B Endpoint 0 interrupt

 

 

 

8

0x0010

USB Address B Endpoint 1 interrupt

 

 

 

9

0x0012

USB Hub interrupt

 

 

 

10

0x0014

DAC interrupt

 

 

 

11

0x0016

GPIO interrupt

 

 

 

12

0x0018

I2C interrupt

14.2Interrupt Latency

Interrupt latency can be calculated from the following equation:

Interrupt latency = (Number of clock cycles remaining in the current instruction) + (10 clock cycles for the CALL instruction) + (5 clock cycles for the JMP instruction)

For example, if a 5-clock cycle instruction such as JC is being executed when an interrupt occurs, the first instruction of the Interrupt Service Routine executes a minimum of 16 clocks (1+10+5) or a maximum of 20 clocks (5+10+5) after the interrupt is issued. For a 12-MHz internal clock (6-MHz crystal), 20 clock periods is 20/12 MHz = 1.667 s.

14.3USB Bus Reset Interrupt

The USB Controller recognizes a USB Reset when a Single Ended Zero (SE0) condition persists on the upstream USB port for 12–16 s. SE0 is defined as the condition in which both the D+ line and the D– line are LOW. A USB Bus Reset may be recognized for an SE0 as short as 12 s, but is always recognized for an SE0 longer than 16 s. When a USB Bus Reset is detected, bit 5 of the Processor Status and Control Register (Figure 13-1) is set to record this event. In addition, the controller clears the following registers:

SIE Section: ....

USB Device Address Registers (0x10, 0x40)

Hub Section:

Hub Ports Connect Status (0x48)

........................................................

Hub Ports Enable (0x49)

........................................................

Hub Ports Speed (0x4A)

....................................................

Hub Ports Suspend (0x4D)

..........................................

Hub Ports Resume Status (0x4E)

.................................................

Hub Ports SE0 Status (0x4F)

...........................................................

Hub Ports Data (0x50)

.............................................

Hub Downstream Force (0x51).

A USB Bus Reset Interrupt is generated at the end of the USB Bus Reset condition when the SE0 state is deasserted. If the USB reset occurs during the start-up delay following a POR, the delay is aborted as described in Section 7.1.

14.4Timer Interrupt

There are two periodic timer interrupts: the 128-s interrupt and the 1.024-ms interrupt. The user should disable both timer interrupts before going into the suspend mode to avoid possible conflicts between servicing the timer interrupts first or the suspend request first.

Document #: 38-08002 Rev. *D

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Contents USB Hub with Microcontroller Cypress Semiconductor CorporationCY7C65113C 18.0 16.017.0 19.0List of Tables Features I2C Functional OverviewGpio USBLogic Block Diagram Pin Assignments Pin ConfigurationsProduct Summary Tables Top View CY7C65113C 28-pin SoicI/O Register Summary Mnemonic Instruction Set SummaryInstruction Set Summary Operand Opcode CyclesProgramming Model 14-bit Program CounterProgram Memory begins here KB -32 Prom ends here CY7C65113C8-bit Program Stack Pointer PSP 8-bit Accumulator a8-bit Temporary Register MOV A, Dspinit 8-bit Data Stack Pointer DSPAddress Modes Xtalout Power-on ResetClocking XtalinSuspend Mode Watchdog ResetPort 0 Data Address General-purpose I/O PortsPort 0,1 Low Isink Gpio Configuration Port Gpio Configuration AddressPort 0 Interrupt Enable 10.0 12-bit Free-Running TimerGpio Interrupt Enable Ports Timer MSB Address 11.0 I2C Configuration RegisterTimer LSB Address 2C Configuration Address2C Status and Control Address 12.0 I2C-compatible ControllerI2C Data Address ACKContinue/Busy Write 1 to indicate ready for next transaction IRQ Processor Status and Control RegisterProcessor Status and Control Address 0xFF Interrupts Global Interrupt Enable Register AddressUSB Endpoint Interrupt Enable Address Interrupt Controller Function Diagram Interrupt VectorsInterrupt Latency USB Bus Reset InterruptTimer Interrupt Gpio Interrupt USB Endpoint InterruptsUSB Hub Interrupt 14.8 I2C InterruptUSB Enumeration USB OverviewUSB Serial Interface Engine SIE ACK/NAK/STALLHub Ports Connect Status Connecting/Disconnecting a USB DeviceUSB Hub Enabling/Disabling a USB Device Hub Ports Enable Register AddressHub Ports Enable Register Hub Downstream Ports Status and ControlHub Ports SE0 Status Address 0x4F Hub Downstream Ports Control Register Address 0x4BHub Ports Force Low Hub Ports Data Register Downstream Port Suspend and ResumeHub Ports Data Hub Ports Suspend Address 0x4DUSB Status and Control Address 0x1F USB Upstream Port Status and ControlHub Ports Resume Address 0x4E USB Device Endpoints USB Serial Interface Engine OperationUSB Device Addresses USB Device Address Device A, B Addresses 0x10A and 0x40BSize Label Start Address USB Control Endpoint Mode RegistersUSB Device Endpoint Zero Mode A0, B0 USB Endpoint Counter Registers USB Non-control Endpoint Mode RegistersUSB Non-control Device Endpoint Mode StallUpdate Endpoint Mode/Count Registers Update and Locking MechanismSetup Set Update only if Fifo is WrittenData Data SetUSB Mode Tables Setup OUTDtog Dval Count Dtog Dval Count Endpoint Register Summary PortsLOW Sample Schematic Absolute Maximum RatingsUSB Interface Electrical CharacteristicsParameter Description Conditions Min Max Unit General Upstream/Downstream PortTimer Signals Switching Characteristics fOSC = 6.0 MHzUSB Full-speed Signaling10 Parameter Description Min Max Unit Clock SourceOrdering Code Prom Size Package Type Operating Range Package DiagramOrdering Information CY7C65113C-SXCTREV ECN no Issue Date Orig. Description of ChangeDocument History