Cypress CY7C65113C manual bit Accumulator a, bit Temporary Register, bit Program Stack Pointer PSP

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CY7C65113C

5.28-bit Accumulator (A)

The accumulator is the general-purpose register for the microcontroller.

5.38-bit Temporary Register (X)

The “X” register is available to the firmware for temporary storage of intermediate results. The microcontroller can perform indexed operations based on the value in X. Refer to Section 5.6.3 for additional information.

5.48-bit Program Stack Pointer (PSP)

During a reset, the Program Stack Pointer (PSP) is set to 0x00 and “grows” upward from this address. The PSP may be set by firmware, using the MOV PSP,A instruction. The PSP supports interrupt service under hardware control and CALL, RET, and RETI instructions under firmware control. The PSP is not readable by the firmware.

During an interrupt acknowledge, interrupts are disabled and the 14-bit program counter, carry flag, and zero flag are written as two bytes of data memory. The first byte is stored in the memory addressed by the PSP, then the PSP is incremented. The second byte is stored in memory addressed by the PSP, and the PSP is incremented again. The overall effect is to store the program counter and flags on the program “stack” and increment the PSP by two.

The Return From Interrupt (RETI) instruction decrements the PSP, then restores the second byte from memory addressed by the PSP. The PSP is decremented again and the first byte is restored from memory addressed by the PSP. After the program counter and flags have been restored from stack, the interrupts are enabled. The overall effect is to restore the program counter and flags from the program stack, decrement the PSP by two, and re-enable interrupts.

The Call Subroutine (CALL) instruction stores the program counter and flags on the program stack and increments the PSP by two.

The Return From Subroutine (RET) instruction restores the program counter but not the flags from the program stack and decrements the PSP by two.

5.4.1Data Memory Organization

The CY7C65113C microcontrollers provide 256 bytes of data RAM. Normally, the SRAM is partitioned into four areas: program stack, user variables, data stack, and USB endpoint FIFOs. The following is one example of where the program stack, data stack, and user variables areas could be located.

After reset

8-bit DSP

8-bit PSP

 

 

(Move DSP[1])

8-bit DSP

Address

0x00

user selected

0xFF

Program Stack Growth

Data Stack Growth

User variables

USB FIFO space for up to two Addresses and five endpoints[2]

Notes:

1.Refer to Section 5.5 for a description of DSP.

2.Endpoint sizes are fixed by the Endpoint Size Bit (I/O register 0x1F, Bit 7). See Table 17-1.

Document #: 38-08002 Rev. *D

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Contents Cypress Semiconductor Corporation USB Hub with MicrocontrollerCY7C65113C 17.0 16.018.0 19.0List of Tables Features Gpio Functional OverviewI2C USBLogic Block Diagram Product Summary Tables Pin ConfigurationsPin Assignments Top View CY7C65113C 28-pin SoicI/O Register Summary Instruction Set Summary Instruction Set SummaryMnemonic Operand Opcode Cycles14-bit Program Counter Programming ModelKB -32 Prom ends here CY7C65113C Program Memory begins here8-bit Temporary Register 8-bit Accumulator a8-bit Program Stack Pointer PSP Address Modes 8-bit Data Stack Pointer DSPMOV A, Dspinit Clocking Power-on ResetXtalout XtalinWatchdog Reset Suspend ModePort 0,1 Low Isink General-purpose I/O PortsPort 0 Data Address Gpio Configuration Address Gpio Configuration PortGpio Interrupt Enable Ports 10.0 12-bit Free-Running TimerPort 0 Interrupt Enable Timer LSB Address 11.0 I2C Configuration RegisterTimer MSB Address 2C Configuration AddressI2C Data Address 12.0 I2C-compatible Controller2C Status and Control Address ACKContinue/Busy Write 1 to indicate ready for next transaction Processor Status and Control Address 0xFF Processor Status and Control RegisterIRQ USB Endpoint Interrupt Enable Address Global Interrupt Enable Register AddressInterrupts Interrupt Vectors Interrupt Controller Function DiagramTimer Interrupt USB Bus Reset InterruptInterrupt Latency USB Hub Interrupt USB Endpoint InterruptsGpio Interrupt 14.8 I2C InterruptUSB Serial Interface Engine SIE USB OverviewUSB Enumeration ACK/NAK/STALLUSB Hub Connecting/Disconnecting a USB DeviceHub Ports Connect Status Hub Ports Enable Register Hub Ports Enable Register AddressEnabling/Disabling a USB Device Hub Downstream Ports Status and ControlHub Ports Force Low Hub Downstream Ports Control Register Address 0x4BHub Ports SE0 Status Address 0x4F Hub Ports Data Downstream Port Suspend and ResumeHub Ports Data Register Hub Ports Suspend Address 0x4DHub Ports Resume Address 0x4E USB Upstream Port Status and ControlUSB Status and Control Address 0x1F USB Device Addresses USB Serial Interface Engine OperationUSB Device Endpoints USB Device Address Device A, B Addresses 0x10A and 0x40BUSB Device Endpoint Zero Mode A0, B0 USB Control Endpoint Mode RegistersSize Label Start Address USB Non-control Device Endpoint Mode USB Non-control Endpoint Mode RegistersUSB Endpoint Counter Registers StallSetup Endpoint Mode/Count Registers Update and Locking MechanismUpdate Data Update only if Fifo is WrittenSet Data SetSetup OUT USB Mode TablesDtog Dval Count Dtog Dval Count Endpoint Ports Register SummaryLOW Absolute Maximum Ratings Sample SchematicParameter Description Conditions Min Max Unit General Electrical CharacteristicsUSB Interface Upstream/Downstream PortUSB Full-speed Signaling10 Switching Characteristics fOSC = 6.0 MHzTimer Signals Parameter Description Min Max Unit Clock SourceOrdering Information Package DiagramOrdering Code Prom Size Package Type Operating Range CY7C65113C-SXCTDocument History Issue Date Orig. Description of ChangeREV ECN no
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