Cypress CY7C65113C manual 11.0 I2C Configuration Register, Timer LSB Address, Timer MSB Address

Page 20

CY7C65113C

Timer LSB

 

 

 

 

 

 

 

Address 0x24

Bit #

7

6

5

4

3

2

1

 

0

Bit Name

Timer Bit 7

TimerBit 6

Timer Bit 5

Timer Bit 4

Timer Bit 3

Timer Bit 2

Timer Bit 1

 

Timer Bit 0

Read/Write

R

R

R

R

R

R

R

 

R

Reset

0

0

0

0

0

0

0

 

0

 

 

 

Figure 10-1. Timer LSB Register

 

 

 

 

Bit [7:0]: Timer lower eight bits.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Timer MSB

 

 

 

 

 

 

 

Address 0x25

Bit #

7

6

5

4

3

2

1

 

0

Bit Name

Reserved

Reserved

Reserved

Reserved

Timer Bit 11

Timer Bit 10

Timer Bit 9

 

Timer Bit 8

Read/Write

R

R

R

 

R

Reset

0

0

0

0

0

0

0

 

0

Figure 10-2. Timer MSB Register

Bit [3:0]: Timer higher nibble

Bit [7:4]: Reserved.

1.024-ms interrupt 128-s interrupt

11

10 9

8

7

6

5

4

3

2

1

0

1 MHz clock

 

 

 

 

 

 

 

 

 

 

 

 

L3

 

L2

 

L1

L0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D3

 

D2

 

D1

D0

D7

 

 

 

 

 

 

 

 

 

 

 

 

D6 D5 D4 D3 D2 D1 D0

8

Figure 10-3. Timer Block Diagram

To Timer Registers

11.0I2C Configuration Register

Internal hardware supports communication with external devices through an I2C-compatible interface. I2C-compatible function is discussed in detail in Section 12.0.[3] The I2C Position bit (Bit 7, Figure 11-1) and I2C Port Width bit (Bit 1, Figure 11-1) select the locations of the SCL (clock) and SDA (data) pins on Port 1 as shown in Table 11-1. These bits are cleared on reset. When the GPIO is configured for I2C function, the internal pull ups on the pins are disabled. Addition of an external weak pull-up resistors on SCL and SDA is recommended.

.

I2C Configuration

 

 

 

 

 

 

 

 

Address 0x09

 

Bit #

 

7

6

5

4

3

2

1

 

0

 

Bit Name

 

I2C Position

Reserved

Reserved

Reserved

Reserved

Reserved

I2C Port

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

Width

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read/Write

 

R/W

R/W

 

R/W

R/W

R/W

 

R/W

R/W

 

R/W

 

Reset

 

0

0

0

0

0

0

0

 

0

 

 

 

 

 

Figure 11-1. I

2C Configuration Register

 

 

 

 

 

Table 11-1.

I2C Port Configuration

 

 

 

 

 

 

 

 

 

 

I2C Position (Bit7, Figure 11-1)

 

I2C Port Width (Bit1, Figure 11-1)

 

 

I2C Position

 

 

0

 

 

 

0

 

 

I2C on P1[1:0], 0:SCL, 1:SDA

Note:

3.I2C-compatible function must be separately enabled, as described in Section 12.0.

Document #: 38-08002 Rev. *D

Page 20 of 49

[+] Feedback

Image 20
Contents USB Hub with Microcontroller Cypress Semiconductor CorporationCY7C65113C 16.0 17.018.0 19.0List of Tables Features Functional Overview GpioI2C USBLogic Block Diagram Pin Configurations Product Summary TablesPin Assignments Top View CY7C65113C 28-pin SoicI/O Register Summary Instruction Set Summary Instruction Set SummaryMnemonic Operand Opcode CyclesProgramming Model 14-bit Program CounterProgram Memory begins here KB -32 Prom ends here CY7C65113C8-bit Program Stack Pointer PSP 8-bit Accumulator a8-bit Temporary Register MOV A, Dspinit 8-bit Data Stack Pointer DSPAddress Modes Power-on Reset ClockingXtalout XtalinSuspend Mode Watchdog ResetPort 0 Data Address General-purpose I/O PortsPort 0,1 Low Isink Gpio Configuration Port Gpio Configuration AddressPort 0 Interrupt Enable 10.0 12-bit Free-Running TimerGpio Interrupt Enable Ports 11.0 I2C Configuration Register Timer LSB AddressTimer MSB Address 2C Configuration Address12.0 I2C-compatible Controller I2C Data Address2C Status and Control Address ACKContinue/Busy Write 1 to indicate ready for next transaction IRQ Processor Status and Control RegisterProcessor Status and Control Address 0xFF Interrupts Global Interrupt Enable Register AddressUSB Endpoint Interrupt Enable Address Interrupt Controller Function Diagram Interrupt VectorsInterrupt Latency USB Bus Reset InterruptTimer Interrupt USB Endpoint Interrupts USB Hub InterruptGpio Interrupt 14.8 I2C InterruptUSB Overview USB Serial Interface Engine SIEUSB Enumeration ACK/NAK/STALLHub Ports Connect Status Connecting/Disconnecting a USB DeviceUSB Hub Hub Ports Enable Register Address Hub Ports Enable RegisterEnabling/Disabling a USB Device Hub Downstream Ports Status and ControlHub Ports SE0 Status Address 0x4F Hub Downstream Ports Control Register Address 0x4BHub Ports Force Low Downstream Port Suspend and Resume Hub Ports DataHub Ports Data Register Hub Ports Suspend Address 0x4DUSB Status and Control Address 0x1F USB Upstream Port Status and ControlHub Ports Resume Address 0x4E USB Serial Interface Engine Operation USB Device AddressesUSB Device Endpoints USB Device Address Device A, B Addresses 0x10A and 0x40BSize Label Start Address USB Control Endpoint Mode RegistersUSB Device Endpoint Zero Mode A0, B0 USB Non-control Endpoint Mode Registers USB Non-control Device Endpoint ModeUSB Endpoint Counter Registers StallUpdate Endpoint Mode/Count Registers Update and Locking MechanismSetup Update only if Fifo is Written DataSet Data SetUSB Mode Tables Setup OUTDtog Dval Count Dtog Dval Count Endpoint Register Summary PortsLOW Sample Schematic Absolute Maximum RatingsElectrical Characteristics Parameter Description Conditions Min Max Unit GeneralUSB Interface Upstream/Downstream PortSwitching Characteristics fOSC = 6.0 MHz USB Full-speed Signaling10Timer Signals Parameter Description Min Max Unit Clock SourcePackage Diagram Ordering InformationOrdering Code Prom Size Package Type Operating Range CY7C65113C-SXCTREV ECN no Issue Date Orig. Description of ChangeDocument History