Samsung spinpoint v40, 3.5" hard disk drives manual Addr valid See note T1 t2

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DISK DRIVE OPERATION

t0

ADDR valid (See note 1)

t1 t2

DIOR-/DIOW-

WRITE

DD(15:0) (See note 2)

READ

DD(15:0) (See note 2)

IORDY (See note 3,3-1)

	tA
IORDY
(See note 3,3-2)	tC
IORDY
(See note 3,3-3)

t9

t2i

t3t4

t5t6

t6z

tRD

tBtC

NOTES −

1Device address consists of signals CS0-, CS1- and DA(2:0)

2Data consists of DD(15:0).

3The negation of IORDY by the device is used to extend the PIO cycle. The determination of whether the cycle is to be extended is made by the host after tA from the assertion of DIOR- or DIOW-. The assertion and negation of IORDY are described in the following three cases:

3-1 Device never negates IORDY, devices keeps IORDY released: no wait is generated.

3-2 Device negates IORDY before tA, but causes IORDY to be asserted before tA. IORDY is released prior to negation and may be asserted for no more than 5 ns before release: no wait generated.

3-3 Device negates IORDY before tA. IORDY is released prior to negation and may be asserted for no more than 5 ns before release: wait generated. The cycle completes after IORDY is reasserted. For cycles where a wait is generated and DIOR- is asserted, the device shall place read data on DD(15:0) for tRD before asserting IORDY.

4DMACK – shall be negated during a PIO data transfer.

Figure 6-2PIO data transfer to/from device

92	SpinPoint V40 Product Manual

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Contents Spinpoint SpinPoint V40 Product Manual Table of Contents Irmware F Eatures Ervo S Ystem EAD and W Rite O PerationsSmart Protocol Overview Programming RequirementsTiming Maintenance Precautions Service and Repair107 General InformationTable of Figures Page Manual Organization User DefinitionScope Commands and Messages Terminology and ConventionsComputer Message Format C/SReference Introduction Key FeaturesDescription Standards and Regulations Hardware RequirementsSpecification Summary SpecificationsPhysical Specifications Logical ConfigurationsPerformance Specifications Power Requirements 28.71Environmental Specifications SV6003H SV6014H SV8004HReliability Specifications Mtbf POHInstallation Space RequirementsMounting Unpacking InstructionsOrientation 2Mounting Dimensions in Millimeters Clearance 3Mounting-Screw ClearanceCable Connectors DC Power ConnectorAT-Bus Interface Connector VentilationSpinPoint V40 Product Manual Jumper Block Configurations Options for Jumper Block Configuration Drive Installation 7DC Power Connector and AT-Bus Interface Cable ConnectionsSystem Startup Procedure ParameterSystem Setup Head / Disk Assembly HDA Base Casting AssemblyDC Spindle Motor Assembly Disk Drive OperationExploded Mechanical View Disk Stack Assembly Head Stack AssemblyVoice Coil Motor and Actuator Latch Assemblies Air Filtration SystemDrive Electronics Digital Signal Process and Interface ControllerAT Disk Controller 2SID2001 AT Controller Block Diagram Host Interface Control Block Buffer Control Block Disk Control BlockSpinPoint V40 Product Manual Power Management Read/Write ICDisk ECC Control Block Frequency SynthesizerTime Base Generator Automatic Gain ControlAsymmetry Correction Circuitry ASC Analog Anti-Aliasing Low Pass Filter3Read/Write 88C5200 Read and Write Operations Servo SystemRead Channel Write Channel Firmware FeaturesRead Caching Write Caching Defect Management Automatic Defect AllocationMulti-burst ECC Correction SmartBlank Signal Summary Signal ConventionsPhysical Interface Signal Descriptions DMACK- DMA Acknowledge Dmarq DMA RequestIntrq Drive Interrupt IOCS16- Drive 16-bit I/ORESET- Drive Reset PDIAG- Passed DiagnosticsIordy I/O Channel Ready SD8 SD6 SD9 SD5 SD4SD3 SD2Drive Drive HostDIR Logical Interface GeneralBit Conventions EnvironmentSpinPoint V40 Product Manual Command Block Registers 2 I/O Register AddressControl Block Registers N N N A a aControl Block Register Descriptions Alternate Status Register 3F6hDrive Address Register 3F7h Device Control Register 3F6hCommand Block Register Descriptions Features Register 1F1hError Register 1F1h Data Register 1F0hCommand Register 1F7h Sector Count Register 1F2hCylinder High Register 1F5h Cylinder Low Register 1F4hStatus Register 1F7h BSY Drdy DWF DSC DRQ Corr IDX ERRAt Command Register Descriptions Command Parameter Used SpinPoint V40 Product Manual Execute Device Diagnostics 90h Check Power Mode 98h, E5hDownload Micro Code 92h Format Track 50h Flush Cache E7hIdentify Device ECh Word Content Description XxxxCapabilities Command set supported 95-128 0000h Reserved 129-159 Vendor specific 160-255 Idle Immediate 95h,E1h Idle 97h,E3hInitialize Device Parameters 91h Read Buffer E4h Read Long 22hwith retry, 23h without retryRead Multiple Command C4h Read Native Max Address F8h Read Sectors 20hwith retry, 21hwithout retryRecalibrate 1xh Read Verify Sectors 40hwith retry, 41hwithout retrySeek 7xh Set Features EFh ModeInputs LBANormal outputs BSY Drdy DRQ ERRDescription Set Multiple Mode C6h Sleep 99h, E6hStandby 96h,E2h Smart disable operation D9hSmart B0h Smart enable operations D8h Smart enable/disable attribute autosave D2hSmart execute off-line immediate D4h Smart read data D0h Byte DescriptionsValue Definition Off-line data collection capabilitySmart capability Smart read log sector D5hSmart return status DAh Smart save attribution value D3hStandby 96h, E2h Standby Immediate 94h, E0hWrite Buffer E8h Write DMA CAhWrite Multiple Command C5h Write Sectors 30hwith retry, 31hwithout retrySpinPoint V40 Product Manual Error Posting Reset ResponseProgramming Requirements Command Error Register Status Register BBKPower Conditions Sleep modeStandby mode Idle modeNormal mode PIO Data in Commands Protocol OverviewPIO Read Command PIO Data Out CommandsPIO Read Aborted Command PIO Write Command PIO Write Aborted CommandBSY=0 DRDY=1 BSY=1 BSY=0 DRQ=1 BSY=1 DRQ=0Non-Data Commands DMA Data Transfer Commands BSY=0 BSY=1 Aborted DMA Command Initialize DMA Reset DMA StatusBSY=1 BSY=0 Timing Register transfersDIOR-/DIOW Write PIO timing parameters Mode PIO data transfersAddr valid See note T1 t2 DIOR-/DIOW Multiword DMA data transfer DIOR-/DIOWMultiword DMA timing parameters Mode Ultra DMA data transfer Initiating an Ultra DMA data in burstUltra DMA data burst timing requirements 19Ultra DMA data burst timing requirementsSustained Ultra DMA data in burst 5Sustained Ultra DMA data in burstHost pausing an Ultra DMA data in burst 6Host pausing an Ultra DMA data in burstDevice terminating an Ultra DMA data in burst 7Device terminating an Ultra DMA data in burst 100Host terminating an Ultra DMA data in burst 8Host terminating an Ultra DMA data in burstInitiating an Ultra DMA data out burst 9Initiating an Ultra DMA data out burst 102Sustained Ultra DMA data out burst 10Sustained Ultra DMA data out burstDevice pausing an Ultra DMA data out burst 11Device pausing an Ultra DMA data out burst 104Host terminating an Ultra DMA data out burst 12Host terminating an Ultra DMA data out burstDevice terminating an Ultra DMA data out burst 13Device terminating an Ultra DMA data out burst 106Service And Repair Maintenance PrecautionsGeneral Information