Samsung 3.5" hard disk drives, spinpoint v40 manual Capabilities

Page 67

 

 

 

 

DISK DRIVE OPERATION

 

 

 

 

 

 

 

 

Table 6-6IDENTIFY DEVICE information (continued)

 

Word

Content

Description

 

 

 

Capabilities

 

 

 

15-14

Reserved

 

 

 

13

1=Standby timer values as specified in this standard are supported

 

 

 

 

0=Standby timer values shall be managed by the device

 

49

0B00h

12

Reserved

 

11

1=IORDY supported

 

 

 

 

0=IORDY may be supported

 

 

 

10

1=IORDY may be disabled

 

 

 

9

Shall be set to one.

 

 

 

8

Shall be set to one.

 

 

 

7-0

Retired

 

50

0000h

Reserved

 

 

 

51

0200h

PIO data transfer cycle timing mode

 

52

0200h

DMA data transfer cycle timing mode

 

 

 

15-3

Reserved

 

53

0007h

2

1=the fields reported in word 88 are valid

 

1

1=the fields reported in words 64-70 are valid

 

 

 

 

 

 

0

1=the fields reported in words 54-58 are valid

 

54

XXXXh

Number of current logical cylinders

 

55

XXXXh

Number of current logical heads

 

56

XXXXh

Number of current logical sectors per track

 

57-58

XXXXh

Current capacity in sectors

 

Word 57 specifies the low world of the capacity

 

 

 

 

 

 

Current Multiple setting. Bit assignments

 

59

0XXXh

15-9

Reserved

 

8

1=Multiple sector setting is valid

 

 

 

 

 

 

7-0

xxh=Current setting for number of sectors

 

60-61

XXXXh

Total number of user addressable sectors (LBA mode only)

 

Word 57 specifies the low world of the capacity

 

 

 

 

62

0000h

Reserved

 

 

 

63

XX07h

Multiword DMA Transfer Capability

 

15-8

Multiword DMA transfer mode active

 

 

 

7-0

(=7) Multiword DMA transfer modes supported (support mode 0 , 1 and 2)

 

64

0003h

Flow Control PIO Transfer modes supported

 

15-8

Reserved

 

 

 

7-0

(=3) Advanced PIO modes supported (‘11b’ = PIO Mode 3 and 4 Supported)

 

65

0078h

Minimum Multiword DMA transfer cycle time per word

 

15-0

Cycle time in nanoseconds (120ns, 16.6MB/S)

 

 

 

 

66

0078h

Manufacturer’s recommended Multiword DMA transfer cycle time

 

15-0

Cycle time in nanoseconds (120ns, 16.6MB/S)

 

 

 

 

67

0078h

Minimum PIO transfer cycle time without flow control

 

15-0

Cycle time in nanoseconds (120ns, 16.6MB/S)

 

 

 

 

68

0078h

Minimum PIO transfer cycle time with IORDY flow control

 

15-0

Cycle time in nanoseconds (120ns, 16.6MB/S)

 

 

 

 

69-79

0000h

Reserved

 

 

 

80

001Eh

Major version number

 

15-0

(=1Eh) ATA-1, ATA-2, ATA-3 and ATA/ATAPI-4

 

 

 

 

81

0017h

Minor version number

 

15-0

(=17h) ATA/ATAPI-4 X3T13 1153D revision 17

 

 

 

SpinPoint V40 Product Manual

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Image 67
Contents Spinpoint SpinPoint V40 Product Manual Table of Contents Irmware F Eatures Ervo S Ystem EAD and W Rite O PerationsSmart Protocol Overview Programming RequirementsTiming General Information Maintenance PrecautionsService and Repair 107Table of Figures Page Manual Organization User DefinitionScope Format C/S Commands and MessagesTerminology and Conventions Computer MessageReference Introduction Key FeaturesDescription Hardware Requirements Standards and RegulationsSpecifications Specification SummaryLogical Configurations Physical SpecificationsPerformance Specifications 28.71 Power RequirementsSV6003H SV6014H SV8004H Environmental SpecificationsMtbf POH Reliability SpecificationsSpace Requirements InstallationMounting Unpacking InstructionsOrientation 2Mounting Dimensions in Millimeters 3Mounting-Screw Clearance ClearanceVentilation Cable ConnectorsDC Power Connector AT-Bus Interface ConnectorSpinPoint V40 Product Manual Jumper Block Configurations Options for Jumper Block Configuration 7DC Power Connector and AT-Bus Interface Cable Connections Drive InstallationParameter System Startup ProcedureSystem Setup Disk Drive Operation Head / Disk Assembly HDABase Casting Assembly DC Spindle Motor AssemblyExploded Mechanical View Air Filtration System Disk Stack AssemblyHead Stack Assembly Voice Coil Motor and Actuator Latch AssembliesDrive Electronics Digital Signal Process and Interface ControllerAT Disk Controller 2SID2001 AT Controller Block Diagram Host Interface Control Block Disk Control Block Buffer Control BlockSpinPoint V40 Product Manual Frequency Synthesizer Power ManagementRead/Write IC Disk ECC Control BlockAnalog Anti-Aliasing Low Pass Filter Time Base GeneratorAutomatic Gain Control Asymmetry Correction Circuitry ASC3Read/Write 88C5200 Read and Write Operations Servo SystemRead Channel Write Channel Firmware FeaturesRead Caching Write Caching Smart Defect ManagementAutomatic Defect Allocation Multi-burst ECC CorrectionBlank Signal Summary Signal ConventionsPhysical Interface Signal Descriptions IOCS16- Drive 16-bit I/O DMACK- DMA AcknowledgeDmarq DMA Request Intrq Drive InterruptRESET- Drive Reset PDIAG- Passed DiagnosticsIordy I/O Channel Ready SD2 SD8 SD6 SD9 SD5SD4 SD3Drive Host DriveDIR Environment Logical InterfaceGeneral Bit ConventionsSpinPoint V40 Product Manual N N N A a a Command Block Registers2 I/O Register Address Control Block RegistersDevice Control Register 3F6h Control Block Register DescriptionsAlternate Status Register 3F6h Drive Address Register 3F7hData Register 1F0h Command Block Register DescriptionsFeatures Register 1F1h Error Register 1F1hCylinder Low Register 1F4h Command Register 1F7hSector Count Register 1F2h Cylinder High Register 1F5hBSY Drdy DWF DSC DRQ Corr IDX ERR Status Register 1F7hAt Command Register Descriptions Command Parameter Used SpinPoint V40 Product Manual Execute Device Diagnostics 90h Check Power Mode 98h, E5hDownload Micro Code 92h Format Track 50h Flush Cache E7hIdentify Device ECh Xxxx Word Content DescriptionCapabilities Command set supported 95-128 0000h Reserved 129-159 Vendor specific 160-255 Idle Immediate 95h,E1h Idle 97h,E3hInitialize Device Parameters 91h Read Long 22hwith retry, 23h without retry Read Buffer E4hRead Multiple Command C4h Read Sectors 20hwith retry, 21hwithout retry Read Native Max Address F8hRecalibrate 1xh Read Verify Sectors 40hwith retry, 41hwithout retrySeek 7xh Mode Set Features EFhBSY Drdy DRQ ERR InputsLBA Normal outputsDescription Sleep 99h, E6h Set Multiple Mode C6hStandby 96h,E2h Smart disable operation D9hSmart B0h Smart enable operations D8h Smart enable/disable attribute autosave D2hSmart execute off-line immediate D4h Byte Descriptions Smart read data D0hOff-line data collection capability Value DefinitionSmart save attribution value D3h Smart capabilitySmart read log sector D5h Smart return status DAhWrite DMA CAh Standby 96h, E2hStandby Immediate 94h, E0h Write Buffer E8hWrite Sectors 30hwith retry, 31hwithout retry Write Multiple Command C5hSpinPoint V40 Product Manual Error Posting Reset ResponseProgramming Requirements BBK Command Error Register Status RegisterIdle mode Power ConditionsSleep mode Standby modeNormal mode Protocol Overview PIO Data in CommandsPIO Read Command PIO Data Out CommandsPIO Read Aborted Command BSY=0 DRQ=1 BSY=1 DRQ=0 PIO Write CommandPIO Write Aborted Command BSY=0 DRDY=1 BSY=1Non-Data Commands DMA Data Transfer Commands BSY=0 BSY=1 Aborted DMA Command Initialize DMA Reset DMA StatusBSY=1 BSY=0 Register transfers TimingDIOR-/DIOW Write PIO data transfers PIO timing parameters ModeAddr valid See note T1 t2 DIOR-/DIOW DIOR-/DIOW Multiword DMA data transferMultiword DMA timing parameters Mode Initiating an Ultra DMA data in burst Ultra DMA data transfer19Ultra DMA data burst timing requirements Ultra DMA data burst timing requirements5Sustained Ultra DMA data in burst Sustained Ultra DMA data in burst6Host pausing an Ultra DMA data in burst Host pausing an Ultra DMA data in burst7Device terminating an Ultra DMA data in burst 100 Device terminating an Ultra DMA data in burst8Host terminating an Ultra DMA data in burst Host terminating an Ultra DMA data in burst9Initiating an Ultra DMA data out burst 102 Initiating an Ultra DMA data out burst10Sustained Ultra DMA data out burst Sustained Ultra DMA data out burst11Device pausing an Ultra DMA data out burst 104 Device pausing an Ultra DMA data out burst12Host terminating an Ultra DMA data out burst Host terminating an Ultra DMA data out burst13Device terminating an Ultra DMA data out burst 106 Device terminating an Ultra DMA data out burstService And Repair Maintenance PrecautionsGeneral Information