Samsung spinpoint v40 Iordy I/O Channel Ready, PDIAG- Passed Diagnostics, RESET- Drive Reset

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DISK DRIVE OPERATION

6.2.3.12IORDY (I/O Channel Ready)

This signal is active low to extend the host transfer cycle of any host register access (Read or Write) when the drive is not ready to respond to a data transfer request. When IORDY is not negated, this signal is in the high impedance state.

6.2.3.13PDIAG- (Passed Diagnostics)

This signal is asserted by Drive 1 to indicate to Drive 0 that it has completed diagnostics. A 10K pull-up resistor is used on this signal by each drive.

Following a power-on reset, software reset, or RESET-, Drive 1 negates PDIAG- within 1 msec (to indicate to Drive 0 that it is busy). Drive 1 then asserts PDIAG- within 30 seconds to indicate that it is no longer busy and is able to provide status. After the assertion of PDIAG-, Drive 1 will be unable to accept commands until it has finished its reset procedure and is Ready (DRDY=1).

Following the receipt of a valid Execute Drive Diagnostics command, Drive 1 negates PDIAG- within 1 msec to indicate to Drive 0 that it is busy and has not yet passed its drive diagnostics. If Drive 1 is present, then Drive 0 waits for up to 5 seconds from the receipt of a valid Execute Drive Diagnostics command for Drive 1 to assert PDIAG-. Drive 1 clears BSY before asserting PDIAG-, as PDIAG- is used to indicate that Drive 1 has passed its diagnostics and is ready to post status.

If DASP- was not asserted by Drive 1 during reset initialization, Drive 0 posts its own status immediately after it completes diagnostics, and clears the Drive 1 Status register to 00h. Drive 0 will be unable to accept commands until it has finished its reset procedure and is Ready (DRDY=1).

6.2.3.14RESET- (Drive Reset)

This signal is asserted from the host system to reset the drive. It shall be asserted for at least 25 ∝ sec after voltage levels have stabilized during power-on; it is negated thereafter unless some event requires that the drive(s) be reset following power-on.

Table 6-1shows the correlation between the signals at the ATA interface and the host AT bus.

42	SpinPoint V40 Product Manual

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Contents Spinpoint SpinPoint V40 Product Manual Table of Contents Smart Ervo S Ystem EAD and W Rite O PerationsIrmware F Eatures Timing Programming RequirementsProtocol Overview 107 Maintenance PrecautionsService and Repair General InformationTable of Figures Page Scope User DefinitionManual Organization Computer Message Commands and MessagesTerminology and Conventions Format C/SReference Description Key FeaturesIntroduction Standards and Regulations Hardware RequirementsSpecification Summary SpecificationsPhysical Specifications Logical ConfigurationsPerformance Specifications Power Requirements 28.71Environmental Specifications SV6003H SV6014H SV8004HReliability Specifications Mtbf POHInstallation Space RequirementsOrientation Unpacking InstructionsMounting 2Mounting Dimensions in Millimeters Clearance 3Mounting-Screw ClearanceAT-Bus Interface Connector Cable ConnectorsDC Power Connector VentilationSpinPoint V40 Product Manual Jumper Block Configurations Options for Jumper Block Configuration Drive Installation 7DC Power Connector and AT-Bus Interface Cable ConnectionsSystem Startup Procedure ParameterSystem Setup DC Spindle Motor Assembly Head / Disk Assembly HDABase Casting Assembly Disk Drive OperationExploded Mechanical View Voice Coil Motor and Actuator Latch Assemblies Disk Stack AssemblyHead Stack Assembly Air Filtration SystemAT Disk Controller Digital Signal Process and Interface ControllerDrive Electronics 2SID2001 AT Controller Block Diagram Host Interface Control Block Buffer Control Block Disk Control BlockSpinPoint V40 Product Manual Disk ECC Control Block Power ManagementRead/Write IC Frequency SynthesizerAsymmetry Correction Circuitry ASC Time Base GeneratorAutomatic Gain Control Analog Anti-Aliasing Low Pass Filter3Read/Write 88C5200 Read Channel Servo SystemRead and Write Operations Read Caching Firmware FeaturesWrite Channel Write Caching Multi-burst ECC Correction Defect ManagementAutomatic Defect Allocation SmartBlank Physical Interface Signal ConventionsSignal Summary Signal Descriptions Intrq Drive Interrupt DMACK- DMA AcknowledgeDmarq DMA Request IOCS16- Drive 16-bit I/OIordy I/O Channel Ready PDIAG- Passed DiagnosticsRESET- Drive Reset SD3 SD8 SD6 SD9 SD5SD4 SD2Drive Drive HostDIR Bit Conventions Logical InterfaceGeneral EnvironmentSpinPoint V40 Product Manual Control Block Registers Command Block Registers2 I/O Register Address N N N A a aDrive Address Register 3F7h Control Block Register DescriptionsAlternate Status Register 3F6h Device Control Register 3F6hError Register 1F1h Command Block Register DescriptionsFeatures Register 1F1h Data Register 1F0hCylinder High Register 1F5h Command Register 1F7hSector Count Register 1F2h Cylinder Low Register 1F4hStatus Register 1F7h BSY Drdy DWF DSC DRQ Corr IDX ERRAt Command Register Descriptions Command Parameter Used SpinPoint V40 Product Manual Download Micro Code 92h Check Power Mode 98h, E5hExecute Device Diagnostics 90h Identify Device ECh Flush Cache E7hFormat Track 50h Word Content Description XxxxCapabilities Command set supported 95-128 0000h Reserved 129-159 Vendor specific 160-255 Initialize Device Parameters 91h Idle 97h,E3hIdle Immediate 95h,E1h Read Buffer E4h Read Long 22hwith retry, 23h without retryRead Multiple Command C4h Read Native Max Address F8h Read Sectors 20hwith retry, 21hwithout retrySeek 7xh Read Verify Sectors 40hwith retry, 41hwithout retryRecalibrate 1xh Set Features EFh ModeNormal outputs InputsLBA BSY Drdy DRQ ERRDescription Set Multiple Mode C6h Sleep 99h, E6hSmart B0h Smart disable operation D9hStandby 96h,E2h Smart execute off-line immediate D4h Smart enable/disable attribute autosave D2hSmart enable operations D8h Smart read data D0h Byte DescriptionsValue Definition Off-line data collection capabilitySmart return status DAh Smart capabilitySmart read log sector D5h Smart save attribution value D3hWrite Buffer E8h Standby 96h, E2hStandby Immediate 94h, E0h Write DMA CAhWrite Multiple Command C5h Write Sectors 30hwith retry, 31hwithout retrySpinPoint V40 Product Manual Programming Requirements Reset ResponseError Posting Command Error Register Status Register BBKStandby mode Power ConditionsSleep mode Idle modeNormal mode PIO Data in Commands Protocol OverviewPIO Read Aborted Command PIO Data Out CommandsPIO Read Command BSY=0 DRDY=1 BSY=1 PIO Write CommandPIO Write Aborted Command BSY=0 DRQ=1 BSY=1 DRQ=0Non-Data Commands DMA Data Transfer Commands BSY=1 BSY=0 Aborted DMA Command Initialize DMA Reset DMA StatusBSY=0 BSY=1 Timing Register transfersDIOR-/DIOW Write PIO timing parameters Mode PIO data transfersAddr valid See note T1 t2 DIOR-/DIOW Multiword DMA data transfer DIOR-/DIOWMultiword DMA timing parameters Mode Ultra DMA data transfer Initiating an Ultra DMA data in burstUltra DMA data burst timing requirements 19Ultra DMA data burst timing requirementsSustained Ultra DMA data in burst 5Sustained Ultra DMA data in burstHost pausing an Ultra DMA data in burst 6Host pausing an Ultra DMA data in burstDevice terminating an Ultra DMA data in burst 7Device terminating an Ultra DMA data in burst 100Host terminating an Ultra DMA data in burst 8Host terminating an Ultra DMA data in burstInitiating an Ultra DMA data out burst 9Initiating an Ultra DMA data out burst 102Sustained Ultra DMA data out burst 10Sustained Ultra DMA data out burstDevice pausing an Ultra DMA data out burst 11Device pausing an Ultra DMA data out burst 104Host terminating an Ultra DMA data out burst 12Host terminating an Ultra DMA data out burstDevice terminating an Ultra DMA data out burst 13Device terminating an Ultra DMA data out burst 106General Information Maintenance PrecautionsService And Repair