Maxim MAX12557 Total Harmonic Distortion THD, Spurious-Free Dynamic Range Sfdr, Aperture Jitter

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Dual, 65Msps, 14-Bit, IF/Baseband ADC

MAX12557

Total Harmonic Distortion (THD)

THD is the ratio of the RMS sum of the first six harmon- ics of the input signal to the fundamental itself. This is expressed as:

 

V 2

+

V 2

+

V 2

+

V 2

+

V 2

+

V 2

THD = 20

log

2

 

3

 

4

 

5

 

6

 

7

 

 

 

 

 

 

V1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

where V1 is the fundamental amplitude, and V2 through V7 are the amplitudes of the 2nd- through 7th-order harmonics (HD2 through HD7).

Spurious-Free Dynamic Range (SFDR)

SFDR is the ratio expressed in decibels of the RMS amplitude of the fundamental (maximum signal compo- nent) to the RMS value of the next largest spurious component, excluding DC offset.

Intermodulation Distortion (IMD)

IMD is the total power of the IM2 to IM5 intermodulation products to the Nyquist frequency relative to the total input power of the two input tones fIN1 and fIN2. The individual input tone levels are at -7dBFS. The inter- modulation products are as follows:

2nd-Order Intermodulation Products (IM2): fIN1 + fIN2, fIN2 - fIN1

3rd-Order Intermodulation Products (IM3): 2 x fIN1 - fIN2, 2 x fIN2 - fIN1, 2 x fIN1 + fIN2, 2 x fIN2 + fIN1

4th-Order Intermodulation Products (IM4): 3 x fIN1 - fIN2, 3 x fIN2 - fIN1, 3 x fIN1 + fIN2,

3 x fIN2 + fIN1, 2 x fIN1 - 2 x fIN2, 2 x fIN1 + 2 x fIN2, 2 x fIN2 - 2 x fIN1

5th-Order Intermodulation Products (IM5):

3 x fIN1 - 2 x fIN2, 3 x fIN2 - 2 x fIN1, 3 x fIN1 + 2 x fIN2, 3 x fIN2 + 2 x fIN1, 4 x fIN1 - fIN2, 4 x fIN2 - fIN1,

4 x fIN1 + fIN2, 4 x fIN2 + fIN1

3rd-Order Intermodulation (IM3)

IM3 is the total power of the 3rd-order intermodulation product to the Nyquist frequency relative to the total input power of the two input tones fIN1 and fIN2. The individual input tone levels are at -7dBFS. The 3rd- order intermodulation products are 2 x fIN1 - fIN2, 2 x fIN2 - fIN1, 2 x fIN1 + fIN2, 2 x fIN2 + fIN1.

Aperture Jitter

Figure 14 shows the aperture jitter (tAJ), which is the sample-to-sample variation in the aperture delay.

CLKN

CLKP

tAD

ANALOG

INPUT

tAJ

SAMPLED

DATA

T/H

HOLD

TRACK

HOLD

Figure 14. T/H Aperture Timing

Aperture Delay

Aperture delay (tAD) is the time defined between the rising edge of the sampling clock and the instant when an actual sample is taken (Figure 14).

Full-Power Bandwidth

A large -0.2dBFS analog input signal is applied to an ADC and the input frequency is swept up to the point where the amplitude of the digitized conversion result has decreased by -3dB. This point is defined as the full-power input bandwidth frequency.

Output Noise (nOUT)

The output noise (nOUT) parameter is similar to thermal plus quantization noise and is an indication of the con- verter’s overall noise performance.

No fundamental input tone is used to test for nOUT. IN_P, IN_N, and COM_ are connected together and 1024k data points are collected. nOUT is computed by taking the RMS value of the collected data points after the mean is removed.

Overdrive Recovery Time

Overdrive recovery time is the time required for the ADC to recover from an input transient that exceeds the full-scale limits. The MAX12557 specifies overdrive recovery time using an input transient that exceeds the full-scale limits by ±10%. The MAX12557 requires one clock cycle to recover from the overdrive condition.

Crosstalk

Coupling onto one channel being driven by a (-0.5dBFS) signal when the adjacent interfering channel is driven by a full-scale signal. Measurement includes all spurs resulting from both direct coupling and mixing components.

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Contents Applications FeaturesGeneral Description Ordering InformationAnalog Input INAP, INAN, INBP, Inbn Parameter Symbol Conditions MIN TYP MAX Units DC AccuracyDynamic Characteristics differential inputs Conversion RateParameter Symbol Conditions MIN TYP MAX Units Vcom Interchannel CharacteristicsInternal Reference Refout DIFFCLK/ Seclk = OV DD Clock Inputs CLKP, ClknDIFFCLK/ Seclk = GND, Clkn = GND Digital Inputs DIFFCLK/ SECLK, G/ T, PD, DIV2, DIV4DIFFCLK/SECLK = GND Power RequirementsD0A-D13A, Dora DIFFCLK/SECLK = OvddFFT Plot 32,768-POINT Data Record Typical Operating CharacteristicsTiming Characteristics Figure MAX12557 TWO-TONE IMD Plot 16,384-POINT Data RecordTHD, Sfdr vs. Clock Speed FIN = 70MHz, AIN = -0.5dBFSVs. Digital Supply Voltage FCLK = 65.00352MHz, fIN = 175MHz FCLK = 65.00352MHz, fIN = 175MHzPDISS, Iovdd Digital SNR, Sinad vs. Clock Duty Cycle FIN = 70MHz, AIN = -0.5dBFSGain Error vs. Temperature Same side of the PC board Pin DescriptionPIN Name Function D2B D0BD1B D3BRefout Detailed DescriptionShref RefinFunctional Diagram Analog Inputs and Input Track-and-Hold T/H Amplifier Reference ConfigurationsReference Mode Reference OutputClock Duty-Cycle Equalizer Clock Input and Clock Control LinesDIV4 DIV2 Function System Timing RequirementsData-Valid Output Output Codes vs. Input Voltage Power-Down Input Vrefp VrefnBinary-to-Gray and Gray-to-Binary Code Conversion Applications Information Using Transformer CouplingSingle-Ended AC-Coupled Input Signal Buffered External Reference Drives Multiple ADCs Unbuffered External Reference Drives Multiple ADCsGrounding, Bypassing, and Board Layout MAX12557Parameter Definitions Overdrive Recovery Time Aperture DelayFull-Power Bandwidth Total Harmonic Distortion THDOffset Matching Pin ConfigurationGain Matching Package Information 68L QFN THIN.EPS