Maxim MAX12557 manual Interchannel Characteristics, Internal Reference Refout, Vcom

Page 4

MAX12557

Dual, 65Msps, 14-Bit, IF/Baseband ADC

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL ≈ 10pF at digital outputs, VIN = -0.5dBFS (differen- tial), DIFFCLK/SECLK = OVDD, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, fCLK = 65MHz, TA = -40°C to

+85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER	SYMBOL	CONDITIONS	MIN	TYP	MAX	UNITS

Overdrive Recovery Time		±10% beyond full scale		1		Clock
Overdrive Recovery Time		±10% beyond full scale		1		Cycle
						Cycle

INTERCHANNEL CHARACTERISTICS

Crosstalk Rejection		fINA or fINB = 70MHz at -0.5dBFS		90		dB
Crosstalk Rejection		fINA or fINB = 175MHz at -0.5dBFS		85		dB
		fINA or fINB = 175MHz at -0.5dBFS		85
Gain Matching				±0.01	±0.1	dB
Offset Matching				±0.01		%FSR

INTERNAL REFERENCE (REFOUT)

REFOUT Output Voltage	VREFOUT		2.000	2.048	2.080	V
REFOUT Load Regulation		-1mA < IREFOUT < +1mA		35		mV/mA
REFOUT Temperature Coefficient	TCREF			±50		ppm/°C
REFOUT Short-Circuit Current		Short to VDD—sinking		0.24		mA
REFOUT Short-Circuit Current		Short to GND—sourcing		2.1		mA
		Short to GND—sourcing		2.1

BUFFERED REFERENCE MODE (REFIN is driven by REFOUT or an external 2.048V single-ended reference source; VREFAP/VREFAN/VCOMA and VREFBP/VREFBN/VCOMB are generated internally)

	REFIN Input Voltage	VREFIN			2.048		V
	REFIN Input Resistance	RREFIN			>50		MΩ
	COM_ Output Voltage	VCOMA	VDD / 2	1.60	1.65	1.70	V
	COM_ Output Voltage	VCOMB	VDD / 2	1.60	1.65	1.70	V
		VCOMB

	REF_P Output Voltage	VREFAP	VDD / 2 + (VREFIN x 3/8)		2.418		V
	REF_P Output Voltage	VREFBP	VDD / 2 + (VREFIN x 3/8)		2.418		V
		VREFBP

	REF_N Output Voltage	VREFAN	VDD / 2 - (VREFIN x 3/8)		0.882		V
	REF_N Output Voltage	VREFBN	VDD / 2 - (VREFIN x 3/8)		0.882		V
		VREFBN

	Differential Reference Voltage	VREFA	VREFA = VREFAP - VREFAN	1.460	1.536	1.580	V
	Differential Reference Voltage	VREFB	VREFB = VREFBP - VREFBN	1.460	1.536	1.580	V
		VREFB	VREFB = VREFBP - VREFBN

	Differential Reference	TCREF			±25		ppm/°C
	Temperature Coefficient	TCREF			±25		ppm/°C
	Temperature Coefficient

UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, VREFAP/VREFAN/VCOMA and VREFBP/VREFBN/VCOMB are applied externally, VCOMA = VCOMB = VDD / 2)

	REF_P Input Voltage	VREFAP	VREF_P	- VCOM	+0.768	V
	REF_P Input Voltage	VREFBP	VREF_P	- VCOM	+0.768	V
		VREFBP

	REF_N Input Voltage	VREFAN	VREF_N	- VCOM	-0.768	V
	REF_N Input Voltage	VREFBN	VREF_N	- VCOM	-0.768	V
		VREFBN

	COM_ Input Voltage	VCOM	VDD / 2		1.65	V
	Differential Reference Voltage	VREFA	VREF_ = VREF_P - VREF_N = VREFIN x 3/4		1.536	V
	Differential Reference Voltage	VREFB	VREF_ = VREF_P - VREF_N = VREFIN x 3/4		1.536	V
		VREFB

4 _______________________________________________________________________________________

Image 4

Contents Features General DescriptionApplications Ordering InformationParameter Symbol Conditions MIN TYP MAX Units DC Accuracy Dynamic Characteristics differential inputsAnalog Input INAP, INAN, INBP, Inbn Conversion RateParameter Symbol Conditions MIN TYP MAX Units Internal Reference Refout Interchannel CharacteristicsVcom Clock Inputs CLKP, Clkn DIFFCLK/ Seclk = GND, Clkn = GNDDIFFCLK/ Seclk = OV DD Digital Inputs DIFFCLK/ SECLK, G/ T, PD, DIV2, DIV4Power Requirements D0A-D13A, DoraDIFFCLK/SECLK = GND DIFFCLK/SECLK = OvddTiming Characteristics Figure Typical Operating CharacteristicsFFT Plot 32,768-POINT Data Record MAX12557 TWO-TONE IMD Plot 16,384-POINT Data RecordTHD, Sfdr vs. Clock Speed FIN = 70MHz, AIN = -0.5dBFSFCLK = 65.00352MHz, fIN = 175MHz PDISS, Iovdd DigitalVs. Digital Supply Voltage FCLK = 65.00352MHz, fIN = 175MHz SNR, Sinad vs. Clock Duty Cycle FIN = 70MHz, AIN = -0.5dBFSGain Error vs. Temperature PIN Name Function Pin DescriptionSame side of the PC board D0B D1BD2B D3BDetailed Description ShrefRefout RefinFunctional Diagram Reference Configurations Reference ModeAnalog Inputs and Input Track-and-Hold T/H Amplifier Reference OutputClock Duty-Cycle Equalizer Clock Input and Clock Control LinesData-Valid Output System Timing RequirementsDIV4 DIV2 Function Output Codes vs. Input Voltage Power-Down Input Vrefp VrefnBinary-to-Gray and Gray-to-Binary Code Conversion Single-Ended AC-Coupled Input Signal Using Transformer CouplingApplications Information Buffered External Reference Drives Multiple ADCs Unbuffered External Reference Drives Multiple ADCsGrounding, Bypassing, and Board Layout MAX12557Parameter Definitions Aperture Delay Full-Power BandwidthOverdrive Recovery Time Total Harmonic Distortion THDGain Matching Pin ConfigurationOffset Matching Package Information 68L QFN THIN.EPS