Transcend Information TS8GCF600 Feature Register Address 1F1h171h Offset 1, 0Dh Write Only

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TS8G~16GCF600

600X CompactFlash Card

 

 

 

￿Feature Register (Address - 1F1h[171h]; Offset 1, 0Dh Write Only)

This register provides information regarding features of the CompactFlash Storage Card that the host can utilize. This register is also accessed in PC Card modes on data bits D15-D8 during a write operation to Offset 0 with -CE2 low and -CE1 high.

￿Sector Count Register (Address - 1F2h[172h]; Offset 2)

This register contains the numbers of sectors of data requested to be transferred on a read or write operation between the host and the CompactFlash Storage Card. If the value in this register is zero, a count of 256 sectors is specified. If the command was successful, this register is zero at command completion. If not successfully completed, the register contains the number of sectors that need to be transferred in order to complete the request.

￿Sector Number (LBA 7-0) Register (Address - 1F3h[173h]; Offset 3)

This register contains the starting sector number or bits 7-0 of the Logical Block Address (LBA) for any CompactFlash Storage Card data access for the subsequent command.

￿6.1.5.5 Cylinder Low (LBA 15-8) Register (Address - 1F4h[174h]; Offset 4)

This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the Logical Block Address.

￿Cylinder High (LBA 23-16) Register (Address - 1F5h[175h]; Offset 5)

This register contains the high order bits of the starting cylinder address or bits 23-16 of the Logical Block Address.

￿Drive/Head (LBA 27-24) Register (Address 1F6h[176h]; Offset 6)

The Drive/Head register is used to select the drive and head. It is also used to select LBA addressing instead of cylinder/head/sector addressing.

Bit 7: this bit is specified as 1 for backward compatibility reasons. It is intended that this bit will become obsolete in a future revision of the specification. This bit is ignored by some controllers in some commands.

Bit 6: LBA is a flag to select either Cylinder/Head/Sector (CHS) or Logical Block Address Mode (LBA). When LBA=0, Cylinder/Head/Sector mode is selected. When LBA=1, Logical Block Address is selected. In Logical Block Mode, the Logical Block Address is interpreted as follows:

LBA7-LBA0: Sector Number Register D7-D0.

LBA15-LBA8: Cylinder Low Register D7-D0.

LBA23-LBA16: Cylinder High Register D7-D0.

LBA27-LBA24: Drive/Head Register bits HS3-HS0.

Bit 5: this bit is specified as 1 for backward compatibility reasons. It is intended that this bit will become obsolete in a future revisions of the specification. This bit is ignored by some controllers in some commands.

Bit 4 (DRV): DRV is the drive number. When DRV=0, drive (card) 0 is selected. When DRV=1, drive (card) 1 is selected. Setting this bit to 1 is obsolete in PCMCIA modes of operation. If the obsolete functionality is support by a CF Storage Card, the CompactFlash Storage Card is set to be Card 0 or 1 using the copy field (Drive #) of the PCMCIA Socket & Copy configuration register.

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Contents Placement Features Power Consumption DimensionsDescription Transcend Block Diagram TS8G~16GCF600 PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Pin Assignments and Pin TypePC Card Memory Mode PC Card I/O Mode Input Characteristics Input Leakage CurrentOutput Drive Type Output Drive Characteristics Output Drive CharacteristicsSymbol Conditions Signal Description Signal Name Dir Pin Description600X CompactFlash Card Csel GNDHdmardy HstrobeSignal Name DirPin Description Reset REGDmack Iordy DdmardyDstrobe Electrical Specification Output Drive Characteristics for Udma mode Input Power Input Characteristics for Udma modeSymbol Parameter SymbolSignal Interface Signal Card HostPull-up pin 45 BVD2 to avoid sensing their batteries as Low 150 a high state per socketUltra DMA Electrical Requirements Series termination required for Ultra DMA operationTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification Speed Version 300 ns Symbol Ieee Symbol Min ns Max nsTable Configuration Register Attribute Memory Write Timing Speed Version 250 ns Symbol Min ns Max nsMin Max Symbol Common Memory Read Timing SpecificationCycle Time Mode 250 ns 120 ns 100 ns 80 ns Symbol IeeeCommon Memory Write Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsData Delay from Wait Rising2 TdIORDY TWTHQV Input Read Timing SpecificationData Delay after Hioe TdHIOE TlGLQV Wait Width Time2 TwIORDY TWTLWTHOutput Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsTrue IDE PIO Mode Read/Write Timing Specification ModeT6Z TS8G~16GCF600 True IDE Multiword DMA Mode Read/Write Timing Specification TS8G~16GCF600 Mode Udma True IDE Ultra DMA Mode Read/Write Timing SpecificationPC Card MEM PC Card IO Mode True IDE Mode UdmaTS8G~16GCF600 Name Name Comment 14.7 Name Mode Mode4Min Max 72.9 50.9Name Min MaxREG Card ConfigurationMultiple Function CompactFlash Storage Cards Selected SpaceDMA Dmardy StrobeDmarq Dmack Stop Hioe Inpack REG Hiow Wait Hioe CMDAttribute Memory Function Table Attribute Memory FunctionDMA CMD REG Configuration Option Register Base + 00h in Attribute Memory TS8G~16GCF600 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory DMA CMD Table Pcmcia Mode I/O FunctionTransfer Function REG -CE2Table PC Card I/O Mode Udma Function Dmarq Dmack Stop Hioe Wait DMA A10Inpack REG Hiow Wait Hioe CMD A00 DMA REG Common Memory Transfer FunctionTable Common Memory Function CE2 CE1 D15-D8True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingTrue IDE Mode Addressing Memory Mapped AddressingCF-ATA Registers Data Register Address 1F0h170hOffset 0,8,9Sector Number LBA 7-0 Register Address 1F3h173h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetTS8G~16GCF600 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh CF-ATA Command Set Command CodeDefinitions Bit Command Check Power Mode 98h or E5hExecute Drive Diagnostic 90h Cyl High Cyl Low Sec Num Sec Cnt FeatureFlush Cache E7h Transcend Information IncErase Sectors C0h Format Track 50hIdentify Device Ech Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureWord Default Total Data Field Type Information BytesXXXXh Command sets enabled PIO data transfer cycle timing modeCommand sets supported Ultra DMA Mode Supported and SelectedCF Advanced PC Card I/O and Memory Timing Mode Capability Word 0 General ConfigurationCF Advanced True IDE Timing Mode Capability and Setting Key management schemes supportedWord 6 Default Number of Sectors per Track Word 1 Default Number of CylindersWord 3 Default Number of Heads Word 49 Capabilities Bit 13 Standby TimerCurrent Number of Cylinders, Heads, Sectors/Track Multiple Sector SettingTotal Sectors Addressable in LBA Mode Current CapacityWords 82-84 Features/command sets supported Recommended Multiword DMA transfer cycle timeWord 68 Minimum PIO transfer cycle time with Iordy Words 85-87 Features/command sets enabled Word 88 Ultra DMA Modes Supported and SelectedWord 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Value Maximum Multiword DMA timing mode supported Word 160 Power Requirement DescriptionValue Maximum PIO mode timing selected Additional Requirements for CF Advanced Timing ModesValue Maximum Memory timing mode Supported Value Current PIO timing mode selectedValue Maximum Pcmcia IO timing mode Supported Current Multiword DMA timing mode selectedValue Maximum PC Card I/O Udma timing mode Supported Value Maximum PC Card Memory Udma timing mode SupportedValue PC Card Memory or I/O Udma timing mode Selected Initialize Drive Parameters 91h Idle 97h or E3hIdle Immediate 95h or E1h Drive Cyl High Cyl Low Sec Num Sec CntNOP 00h Read Buffer E4hRead DMA C8h Read Long Sector 22h or 23h TS8G~16GCF600 Seek 7Xh Set Features EFh Request Sense 03hFeature Supported TS8G~16GCF600 Standby Immediate 94h or E0h Translate Sector 87h Translate Sector InformationWear Level F5h Write Buffer E8h Write DMA CAh TS8G~16GCF600 TS8G~16GCF600 Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERRNOP S. Table Capacity Ordering Information Transcend Product Capacity CompactFlash Card
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