Transcend Information TS8GCF600, TS16GCF600 dimensions Name Comment

Page 34

TS8G~16GCF600

600X CompactFlash Card

 

 

 

4)The parameter tLI shall be measured at the connector of the sender or recipient that is responding to an incoming transition from the recipient or sender respectively. Both the incoming signal and the outgoing response shall be measured at the same connector.

5)The parameter tAZ shall be measured at the connector of the sender or recipient that is driving the bus but must release the bus the allow for a bus turnaround.

Name

Comment

 

 

t2CYCTYP

Typical sustained average two cycle time

tCYC

Cycle time allowing for asymmetry and clock variations (from STROBE edge to STROBE edge)

 

 

t2CYC

Two cycle time allowing for clock variations (from rising edge to next rising edge or from falling edge to

next falling edge of STROBE)

 

tDS

Data setup time at recipient (from data valid until STROBE edge)

 

 

tDH

Data hold time at recipient (from STROBE edge until data may become invalid)

 

 

tDVS

Data valid setup time at sender (from data valid until STROBE edge)

tDVH

Data valid hold time at sender (from STROBE edge until data may become invalid)

 

 

tCS

CRC word setup time at device

 

 

tCH

CRC word hold time device

tCVS

CRC word valid setup time at host (from CRC valid until -DMACK negation)

tCVH

CRC word valid hold time at sender (from -DMACK negation until CRC may become invalid)

tZFS

Time from STROBE output released-to-driving until the first transition of critical timing.

tDZFS

Time from data output released-to-driving until the first transition of critical timing.

 

 

tFS

First STROBE time (for device to first negate DSTROBE from STOP during a data in burst)

 

 

tLI

Limited interlock time

tMLI

Interlock time with minimum

tUI

Unlimited interlock time

tAZ

Maximum time allowed for output drivers to release (from asserted or negated)

tZAH

Minimum delay time required for output

 

 

tZAD

drivers to assert or negate (from released)

 

 

tENV

Envelope time (from -DMACK to STOP and -HDMARDY during data in burst initiation and from

DMACK to STOP during data out burst initiation)

 

tRFS

Ready-to-final-STROBE time (no STROBE edges shall be sent this long after negation of -DMARDY)

 

 

tRP

Ready-to-pause time (that recipient shall wait to pause after negating -DMARDY)

tIORDYZ

Maximum time before releasing IORDY

 

 

tZIORDY

Minimum time before driving IORDY

tACK

Setup and hold times for -DMACK (before assertion or negation)

tSS

Time from STROBE edge to negation of DMARQ or assertion of STOP (when sender terminates a

burst)

 

 

 

Notes

2, 5 2, 5 3 3 2 2 3 3

1

1

1

6 4, 6

Transcend Information Inc.

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V1.0

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Contents Power Consumption Dimensions Placement FeaturesDescription Transcend Block Diagram TS8G~16GCF600 PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Pin Assignments and Pin TypePC Card Memory Mode PC Card I/O Mode Input Leakage Current Input CharacteristicsOutput Drive Type Output Drive Characteristics Output Drive CharacteristicsSymbol Conditions Signal Name Dir Pin Description Signal Description600X CompactFlash Card Csel GNDHdmardy HstrobeDir Signal NamePin Description REG ResetDmack Ddmardy IordyDstrobe Electrical Specification Output Drive Characteristics for Udma mode Input Power Input Characteristics for Udma modeSymbol Parameter SymbolSignal Interface Signal Card HostPull-up pin 45 BVD2 to avoid sensing their batteries as Low 150 a high state per socketSeries termination required for Ultra DMA operation Ultra DMA Electrical RequirementsTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification Speed Version 300 ns Symbol Ieee Symbol Min ns Max nsTable Configuration Register Attribute Memory Write Timing Speed Version 250 ns Symbol Min ns Max nsMin Max Symbol Common Memory Read Timing SpecificationCycle Time Mode 250 ns 120 ns 100 ns 80 ns Symbol IeeeCommon Memory Write Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsData Delay from Wait Rising2 TdIORDY TWTHQV Input Read Timing SpecificationData Delay after Hioe TdHIOE TlGLQV Wait Width Time2 TwIORDY TWTLWTHOutput Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsMode True IDE PIO Mode Read/Write Timing SpecificationT6Z TS8G~16GCF600 True IDE Multiword DMA Mode Read/Write Timing Specification TS8G~16GCF600 Mode Udma True IDE Ultra DMA Mode Read/Write Timing SpecificationPC Card MEM PC Card IO Mode True IDE Mode UdmaTS8G~16GCF600 Name Name Comment 14.7 Name Mode Mode4Min Max 72.9 50.9Name Min MaxREG Card ConfigurationMultiple Function CompactFlash Storage Cards Selected SpaceDMA Dmardy StrobeDmarq Dmack Stop Hioe Inpack REG Hiow Wait Hioe CMDTable Attribute Memory Function Attribute Memory FunctionDMA CMD REG Configuration Option Register Base + 00h in Attribute Memory TS8G~16GCF600 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory DMA CMD Table Pcmcia Mode I/O FunctionTransfer Function REG -CE2Dmarq Dmack Stop Hioe Wait DMA A10 Table PC Card I/O Mode Udma FunctionInpack REG Hiow Wait Hioe CMD A00 DMA REG Common Memory Transfer FunctionTable Common Memory Function CE2 CE1 D15-D8True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingTrue IDE Mode Addressing Memory Mapped AddressingCF-ATA Registers Data Register Address 1F0h170hOffset 0,8,9Sector Number LBA 7-0 Register Address 1F3h173h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetTS8G~16GCF600 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh CF-ATA Command Set Command CodeDefinitions Bit Command Check Power Mode 98h or E5hExecute Drive Diagnostic 90h Cyl High Cyl Low Sec Num Sec Cnt FeatureFlush Cache E7h Transcend Information IncErase Sectors C0h Format Track 50hIdentify Device Ech Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureWord Default Total Data Field Type Information BytesXXXXh Command sets enabled PIO data transfer cycle timing modeCommand sets supported Ultra DMA Mode Supported and SelectedCF Advanced PC Card I/O and Memory Timing Mode Capability Word 0 General ConfigurationCF Advanced True IDE Timing Mode Capability and Setting Key management schemes supportedWord 6 Default Number of Sectors per Track Word 1 Default Number of CylindersWord 3 Default Number of Heads Word 49 Capabilities Bit 13 Standby TimerCurrent Number of Cylinders, Heads, Sectors/Track Multiple Sector SettingTotal Sectors Addressable in LBA Mode Current CapacityRecommended Multiword DMA transfer cycle time Words 82-84 Features/command sets supportedWord 68 Minimum PIO transfer cycle time with Iordy Words 85-87 Features/command sets enabled Word 88 Ultra DMA Modes Supported and SelectedWord 89 Time required for Security erase unit completion Word 91 Advanced power management level valueWord 128 Security Status Bit 8 Security Level Value Maximum Multiword DMA timing mode supported Word 160 Power Requirement DescriptionValue Maximum PIO mode timing selected Additional Requirements for CF Advanced Timing ModesValue Maximum Memory timing mode Supported Value Current PIO timing mode selectedValue Maximum Pcmcia IO timing mode Supported Current Multiword DMA timing mode selectedValue Maximum PC Card Memory Udma timing mode Supported Value Maximum PC Card I/O Udma timing mode SupportedValue PC Card Memory or I/O Udma timing mode Selected Initialize Drive Parameters 91h Idle 97h or E3hIdle Immediate 95h or E1h Drive Cyl High Cyl Low Sec Num Sec CntRead Buffer E4h NOP 00hRead DMA C8h Read Long Sector 22h or 23h TS8G~16GCF600 Seek 7Xh Set Features EFh Request Sense 03hFeature Supported TS8G~16GCF600 Standby Immediate 94h or E0h Translate Sector 87h Translate Sector InformationWear Level F5h Write Buffer E8h Write DMA CAh TS8G~16GCF600 TS8G~16GCF600 BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERR Error PostingNOP S. Table Capacity Ordering Information Transcend Product Capacity CompactFlash Card
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