Transcend Information TS8GCF600, TS16GCF600 dimensions Dir, Signal Name, Pin Description

Page 12

TS8G~16GCF600

 

600X CompactFlash Card

 

 

 

 

 

 

 

 

 

 

 

 

Signal Name

Dir.

Pin

Description

-IOWR

I

35

This signal is not used in this mode.

(PC Card Memory Mode– Except

 

 

 

 

 

 

Ultra DMA Protocol Active)

 

 

 

 

-IOWR

 

 

The I/O Write strobe pulse is used to clock I/O data on the Card Data bus into

 

 

the CompactFlash Storage Card controller registers when the CompactFlash

(PC Card I/O Mode –Except Ultra

 

 

 

 

Storage Card is configured to use the I/O interface.

DMA Protocol Active)

 

 

 

 

 

 

The clocking shall occur on the negative to positive edge of the signal (trailing

 

 

 

 

edge).

-IOWR

 

 

In True IDE Mode, while Ultra DMA mode protocol is not active, this signal has

 

 

the same function as in PC Card I/O Mode. When Ultra DMA mode protocol is

(True IDE Mode – Except Ultra

 

 

 

 

supported, this signal must be negated before entering Ultra DMA mode

DMA Protocol Active)

 

 

 

 

protocol.

 

 

 

 

STOP

 

 

In All Modes, while Ultra DMA mode protocol is active, the assertion of this

 

 

signal causes the termination of the Ultra DMA data burst.

(All Modes – Ultra DMA Protocol

 

 

Active)

 

 

 

 

 

 

 

 

-OE

I

9

This is an Output Enable strobe generated by the host interface. It is used to

(PC Card Memory Mode)

 

 

read data from the CompactFlash Storage Card in Memory Mode and to read

 

 

 

 

the CIS and configuration registers.

-OE

 

 

In PC Card I/O Mode, this signal is used to read the CIS and configuration

(PC Card I/O Mode)

 

 

registers.

-ATA SEL

 

 

To enable True IDE Mode this input should be grounded by the host.

(True IDE Mode)

 

 

 

 

READY

O

37

In Memory Mode, this signal is set high when the CompactFlash Storage Card

(PC Card Memory Mode)

 

 

is ready to accept a new data transfer operation and is held low when the card is

 

 

 

 

busy.

 

 

 

 

At power up and at Reset, the READY signal is held low (busy) until the

 

 

 

 

CompactFlash Storage Card has completed its power up or reset function. No

 

 

 

 

access of any type should be made to the CompactFlash Storage Card during

 

 

 

 

this time.

 

 

 

 

Note, however, that when a card is powered up and used with RESET

 

 

 

 

continuously disconnected or asserted, the Reset function of the RESET pin is

 

 

 

 

disabled. Consequently, the continuous assertion of RESET from the

 

 

 

 

application of power shall not cause the READY signal to remain continuously in

 

 

 

 

the busy state.

-IREQ

 

 

I/O Operation – After the CompactFlash Storage Card Card has been

(PC Card I/O Mode)

 

 

configured for I/O operation, this signal is used as -Interrupt Request. This line is

 

 

 

 

strobed low to generate a pulse mode interrupt or held low for a level mode

INTRQ

 

 

interrupt.

 

 

 

 

(True IDE Mode)

 

 

In True IDE Mode signal is the active high Interrupt Request to the host.

 

 

 

 

Transcend Information Inc.

12

V1.0

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Contents Placement Features Power Consumption DimensionsDescription Transcend Block Diagram TS8G~16GCF600 PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Pin Assignments and Pin TypePC Card Memory Mode PC Card I/O Mode Input Characteristics Input Leakage CurrentOutput Drive Type Output Drive Characteristics Output Drive CharacteristicsSymbol Conditions Signal Description Signal Name Dir Pin Description600X CompactFlash Card Csel GNDHdmardy HstrobeSignal Name DirPin Description Reset REGDmack Iordy DdmardyDstrobe Electrical Specification Input Power Input Characteristics for Udma mode SymbolOutput Drive Characteristics for Udma mode Parameter SymbolSignal Interface Signal Card HostPull-up pin 45 BVD2 to avoid sensing their batteries as Low 150 a high state per socketUltra DMA Electrical Requirements Series termination required for Ultra DMA operationTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification Speed Version 300 ns Symbol Ieee Symbol Min ns Max nsTable Configuration Register Attribute Memory Write Timing Speed Version 250 ns Symbol Min ns Max nsCommon Memory Read Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 ns SymbolMin Max Symbol IeeeCommon Memory Write Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsInput Read Timing Specification Data Delay after Hioe TdHIOE TlGLQVData Delay from Wait Rising2 TdIORDY TWTHQV Wait Width Time2 TwIORDY TWTLWTHOutput Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsTrue IDE PIO Mode Read/Write Timing Specification ModeT6Z TS8G~16GCF600 True IDE Multiword DMA Mode Read/Write Timing Specification TS8G~16GCF600 True IDE Ultra DMA Mode Read/Write Timing Specification PC Card MEM PC Card IO ModeMode Udma True IDE Mode UdmaTS8G~16GCF600 Name Name Comment Name Mode Mode4 Min Max14.7 72.9 50.9Name Min MaxCard Configuration Multiple Function CompactFlash Storage CardsREG Selected SpaceDmardy Strobe Dmarq Dmack Stop HioeDMA Inpack REG Hiow Wait Hioe CMDAttribute Memory Function Table Attribute Memory FunctionDMA CMD REG Configuration Option Register Base + 00h in Attribute Memory TS8G~16GCF600 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Table Pcmcia Mode I/O Function Transfer FunctionDMA CMD REG -CE2Table PC Card I/O Mode Udma Function Dmarq Dmack Stop Hioe Wait DMA A10Inpack REG Hiow Wait Hioe CMD A00 Common Memory Transfer Function Table Common Memory FunctionDMA REG CE2 CE1 D15-D8True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingTrue IDE Mode Addressing Memory Mapped AddressingCF-ATA Registers Data Register Address 1F0h170hOffset 0,8,9Feature Register Address 1F1h171h Offset 1, 0Dh Write Only Sector Count Register Address 1F2h172h OffsetSector Number LBA 7-0 Register Address 1F3h173h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetTS8G~16GCF600 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh CF-ATA Command Set Command CodeDefinitions Check Power Mode 98h or E5h Execute Drive Diagnostic 90hBit Command Cyl High Cyl Low Sec Num Sec Cnt FeatureTranscend Information Inc Erase Sectors C0hFlush Cache E7h Format Track 50hDrive Cyl High Cyl Low Sec Num Sec Cnt Feature Word Default Total Data Field Type InformationIdentify Device Ech BytesPIO data transfer cycle timing mode Command sets supportedXXXXh Command sets enabled Ultra DMA Mode Supported and SelectedWord 0 General Configuration CF Advanced True IDE Timing Mode Capability and SettingCF Advanced PC Card I/O and Memory Timing Mode Capability Key management schemes supportedWord 1 Default Number of Cylinders Word 3 Default Number of HeadsWord 6 Default Number of Sectors per Track Word 49 Capabilities Bit 13 Standby TimerMultiple Sector Setting Total Sectors Addressable in LBA ModeCurrent Number of Cylinders, Heads, Sectors/Track Current CapacityWords 82-84 Features/command sets supported Recommended Multiword DMA transfer cycle timeWord 68 Minimum PIO transfer cycle time with Iordy Words 85-87 Features/command sets enabled Word 88 Ultra DMA Modes Supported and SelectedWord 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Word 160 Power Requirement Description Value Maximum PIO mode timing selectedValue Maximum Multiword DMA timing mode supported Additional Requirements for CF Advanced Timing ModesValue Current PIO timing mode selected Value Maximum Pcmcia IO timing mode SupportedValue Maximum Memory timing mode Supported Current Multiword DMA timing mode selectedValue Maximum PC Card I/O Udma timing mode Supported Value Maximum PC Card Memory Udma timing mode SupportedValue PC Card Memory or I/O Udma timing mode Selected Idle 97h or E3h Idle Immediate 95h or E1hInitialize Drive Parameters 91h Drive Cyl High Cyl Low Sec Num Sec CntNOP 00h Read Buffer E4hRead DMA C8h Read Long Sector 22h or 23h TS8G~16GCF600 Seek 7Xh Set Features EFh Request Sense 03hFeature Supported TS8G~16GCF600 Standby Immediate 94h or E0h Translate Sector 87h Translate Sector InformationWear Level F5h Write Buffer E8h Write DMA CAh TS8G~16GCF600 TS8G~16GCF600 Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERRNOP S. Table Capacity Ordering Information Transcend Product Capacity CompactFlash Card
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