Transcend Information TS16GCF600, TS8GCF600 dimensions Reg, Dmack, Reset

Page 13

TS8G~16GCF600

 

600X CompactFlash Card

 

 

 

 

 

 

 

 

 

 

 

 

Signal Name

Dir.

Pin

Description

-REG

I

44

This signal is used during Memory Cycles to distinguish between Common

Memory and Register (Attribute) Memory accesses. High for Common Memory,

(PC Card Memory Mode– Except

 

 

 

 

Low for Attribute Memory.

Ultra DMA Protocol Active)

 

 

 

 

 

 

Attribute Memory Select

 

 

In PC Card Memory Mode, when Ultra DMA Protocol is supported by the host

 

 

 

 

and the host has enabled Ultra DMA protocol on the card the, host shall keep the

 

 

 

 

-REG signal negated during the execution of any DMA Command by the device.

-REG

 

 

The signal shall also be active (low) during I/O Cycles when the I/O address is

 

 

on the Bus.

(PC Card I/O Mode –Except Ultra

 

 

DMA Protocol Active)

 

 

In PC Card I/O Mode, when Ultra DMA Protocol is supported by the host and the

 

 

 

 

 

 

 

 

host has enabled Ultra DMA protocol on the card the, host shall keep the -REG

 

 

 

 

signal asserted during the execution of any DMA Command by the device.

-DMACK

 

 

This is a DMA Acknowledge signal that is asserted by the host in response to

(PC Card Memory Mode when

 

 

(-)DMARQ to initiate DMA transfers.

Ultra DMA Protocol Active)

 

 

In True IDE Mode, while DMA operations are not active, the card shall ignore the

DMACK

 

 

 

 

(-)DMACK signal, including a floating condition.

(PC Card I/O Mode when Ultra

 

 

 

 

DMA Protocol Active)

 

 

If DMA operation is not supported by a True IDE Mode only host, this signal

-DMACK

 

 

should be driven high or connected to VCC by the host.

 

 

 

 

(True IDE Mode)

 

 

A host that does not support DMA mode and implements both PC Card and

 

 

 

 

True-IDE modes of operation need not alter the PC Card mode connections

 

 

 

 

while in True-IDE mode as long as this does not prevent proper operation all

 

 

 

 

modes.

RESET

I

41

The CompactFlash Storage Card is Reset when the RESET pin is high with the

(PC Card Memory Mode)

 

 

following important exception:

 

 

 

 

The host may leave the RESET pin open or keep it continually high from the

 

 

 

 

application of power without causing a continuous Reset of the card. Under

 

 

 

 

either of these conditions, the card shall emerge from power-up having

 

 

 

 

completed an initial Reset.

 

 

 

 

The CompactFlash Storage Card is also Reset when the Soft Reset bit in the

 

 

 

 

Card Configuration Option Register is set.

RESET

 

 

This signal is the same as the PC Card Memory Mode signal.

(PC Card I/O Mode)

 

 

 

 

-RESET

 

 

In the True IDE Mode, this input pin is the active low hardware reset from the

(True IDE Mode)

 

 

host.

 

 

 

 

 

 

 

 

VCC

--

13,38

+5 V, +3.3 V power.

(PC Card Memory Mode)

 

 

 

 

VCC

 

 

This signal is the same for all modes.

(PC Card I/O Mode)

 

 

 

 

VCC

 

 

This signal is the same for all modes.

(True IDE Mode)

 

 

 

 

 

 

 

 

 

 

Transcend Information Inc.

 

13

 

 

 

 

 

V1.0

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Contents Power Consumption Dimensions Placement FeaturesDescription Transcend Block Diagram TS8G~16GCF600 Pin Assignments and Pin Type PC Card Memory Mode PC Card I/O Mode True IDE Mode4PC Card Memory Mode PC Card I/O Mode Input Leakage Current Input CharacteristicsOutput Drive Type Output Drive Characteristics Output Drive CharacteristicsSymbol Conditions Signal Name Dir Pin Description Signal Description600X CompactFlash Card GND CselHstrobe HdmardyDir Signal NamePin Description REG ResetDmack Ddmardy IordyDstrobe Electrical Specification Symbol Input Power Input Characteristics for Udma modeOutput Drive Characteristics for Udma mode Parameter SymbolSignal Card Host Signal Interface150 a high state per socket Pull-up pin 45 BVD2 to avoid sensing their batteries as LowSeries termination required for Ultra DMA operation Ultra DMA Electrical RequirementsTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Speed Version 300 ns Symbol Ieee Symbol Min ns Max ns Attribute Memory Read Timing SpecificationSpeed Version 250 ns Symbol Min ns Max ns Table Configuration Register Attribute Memory Write TimingCycle Time Mode 250 ns 120 ns 100 ns 80 ns Symbol Common Memory Read Timing SpecificationMin Max Symbol IeeeCycle Time Mode 250 ns 120 ns 100 ns 80 ns Common Memory Write Timing SpecificationData Delay after Hioe TdHIOE TlGLQV Input Read Timing SpecificationData Delay from Wait Rising2 TdIORDY TWTHQV Wait Width Time2 TwIORDY TWTLWTHCycle Time Mode 255 ns 120 ns 100 ns 80 ns Output Write Timing SpecificationMode True IDE PIO Mode Read/Write Timing SpecificationT6Z TS8G~16GCF600 True IDE Multiword DMA Mode Read/Write Timing Specification TS8G~16GCF600 PC Card MEM PC Card IO Mode True IDE Ultra DMA Mode Read/Write Timing SpecificationMode Udma True IDE Mode UdmaTS8G~16GCF600 Name Name Comment Min Max Name Mode Mode414.7 72.9 50.9Min Max NameMultiple Function CompactFlash Storage Cards Card ConfigurationREG Selected SpaceDmarq Dmack Stop Hioe Dmardy StrobeDMA Inpack REG Hiow Wait Hioe CMDTable Attribute Memory Function Attribute Memory FunctionDMA CMD REG Configuration Option Register Base + 00h in Attribute Memory TS8G~16GCF600 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O FunctionDMA CMD REG -CE2Dmarq Dmack Stop Hioe Wait DMA A10 Table PC Card I/O Mode Udma FunctionInpack REG Hiow Wait Hioe CMD A00 Table Common Memory Function Common Memory Transfer FunctionDMA REG CE2 CE1 D15-D8True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding Primary and Secondary Address ConfigurationsTable Contiguous I/O Decoding Contiguous I/O Mapped AddressingMemory Mapped Addressing True IDE Mode AddressingData Register Address 1F0h170hOffset 0,8,9 CF-ATA RegistersSector Count Register Address 1F2h172h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Number LBA 7-0 Register Address 1F3h173h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetTS8G~16GCF600 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh Command Code CF-ATA Command SetDefinitions Execute Drive Diagnostic 90h Check Power Mode 98h or E5hBit Command Cyl High Cyl Low Sec Num Sec Cnt FeatureErase Sectors C0h Transcend Information IncFlush Cache E7h Format Track 50hWord Default Total Data Field Type Information Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureIdentify Device Ech BytesCommand sets supported PIO data transfer cycle timing modeXXXXh Command sets enabled Ultra DMA Mode Supported and SelectedCF Advanced True IDE Timing Mode Capability and Setting Word 0 General ConfigurationCF Advanced PC Card I/O and Memory Timing Mode Capability Key management schemes supportedWord 3 Default Number of Heads Word 1 Default Number of CylindersWord 6 Default Number of Sectors per Track Word 49 Capabilities Bit 13 Standby TimerTotal Sectors Addressable in LBA Mode Multiple Sector SettingCurrent Number of Cylinders, Heads, Sectors/Track Current CapacityRecommended Multiword DMA transfer cycle time Words 82-84 Features/command sets supportedWord 68 Minimum PIO transfer cycle time with Iordy Word 88 Ultra DMA Modes Supported and Selected Words 85-87 Features/command sets enabledWord 89 Time required for Security erase unit completion Word 91 Advanced power management level valueWord 128 Security Status Bit 8 Security Level Value Maximum PIO mode timing selected Word 160 Power Requirement DescriptionValue Maximum Multiword DMA timing mode supported Additional Requirements for CF Advanced Timing ModesValue Maximum Pcmcia IO timing mode Supported Value Current PIO timing mode selectedValue Maximum Memory timing mode Supported Current Multiword DMA timing mode selectedValue Maximum PC Card Memory Udma timing mode Supported Value Maximum PC Card I/O Udma timing mode SupportedValue PC Card Memory or I/O Udma timing mode Selected Idle Immediate 95h or E1h Idle 97h or E3hInitialize Drive Parameters 91h Drive Cyl High Cyl Low Sec Num Sec CntRead Buffer E4h NOP 00hRead DMA C8h Read Long Sector 22h or 23h TS8G~16GCF600 Request Sense 03h Seek 7Xh Set Features EFhFeature Supported TS8G~16GCF600 Translate Sector Information Standby Immediate 94h or E0h Translate Sector 87hWear Level F5h Write Buffer E8h Write DMA CAh TS8G~16GCF600 TS8G~16GCF600 BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERR Error PostingNOP S. Table Capacity Transcend Product Capacity CompactFlash Card Ordering Information
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