Transcend Information TS8GCF600 Input Power Input Characteristics for Udma mode, Parameter, Units

Page 16

TS8G~16GCF600		600X CompactFlash Card

Input Power

Input Characteristics for UDMA mode >4

In UDMA modes greater than 4, the following characteristics apply. Voltage output high and low values shall be met at the source connector to include the effect of series termination.

Table: Input Characteristics (UDMA Mode > 4)

Parameter

DC supply voltage to drivers

Low to high input threshold High to low input threshold Difference between input thresholds:

((V+ current value) - (V-current value))

Average of thresholds:

((V+ current value) + (V-current value))/2

Symbol

VDD3

V+

V-

VHYS

VTHRAVG

MIN	MAX
3.3 –8%	3.3% + 8%
1.5	2.0
1.0	1.5
320

1.3	1.7

Units

Volts

Volts Volts

Volts

Volts

Output Drive Characteristics for UDMA mode > 4

In UDMA modes greater than 4, the characteristics specified in the following table apply. Voltage output high and low values shall be met at the source connector to include the effect of series termination.

	Table: Output Drive Characteristics (UDMA Mode > 4)
	Parameter	Symbol	MIN	MAX
	DC supply voltage to drivers	VDD3	3.3 –8%	3.3% + 8%
	Voltage output high at -6 mA to +3 mA (at VoH2 the output shall	VoH2	VDD3–0.51	VDD3+0.3
	be able to supply and sink current toVDD3)	VoH2	VDD3–0.51	VDD3+0.3
	be able to supply and sink current toVDD3)
	Voltage output low at 6 mA	VoL2		0.51

Units

Volts

Volts

Volts

Notes:
1)	IoLDASP shall be 12 mA minimum to meet legacy timing and signal integrity.
2)	IoH value at 400 A is insufficient in the case of DMARQ that is pulled low by a 5.6 k resistor.
3)		μ		Ω
	Voltage output high and low values shall be met at the source connector to include the effect of series termination.
4) A device shall have less than 64			A of leakage current into a 6.2 K pull-down resistor while the INTRQ signal is in the released
	state.		Ω
μ
Transcend Information Inc.			16
				V1.0

Image 16

Contents Power Consumption Dimensions Placement FeaturesDescription Transcend Block Diagram TS8G~16GCF600 PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Pin Assignments and Pin TypePC Card Memory Mode PC Card I/O Mode Input Leakage Current Input CharacteristicsOutput Drive Type Output Drive Characteristics Output Drive CharacteristicsSymbol Conditions Signal Name Dir Pin Description Signal Description600X CompactFlash Card Csel GNDHdmardy HstrobeDir Signal NamePin Description REG Reset Dmack Ddmardy IordyDstrobe Electrical Specification Input Power Input Characteristics for Udma mode SymbolOutput Drive Characteristics for Udma mode Parameter SymbolSignal Interface Signal Card HostPull-up pin 45 BVD2 to avoid sensing their batteries as Low 150 a high state per socketSeries termination required for Ultra DMA operation Ultra DMA Electrical RequirementsTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification Speed Version 300 ns Symbol Ieee Symbol Min ns Max nsTable Configuration Register Attribute Memory Write Timing Speed Version 250 ns Symbol Min ns Max nsCommon Memory Read Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 ns SymbolMin Max Symbol IeeeCommon Memory Write Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsInput Read Timing Specification Data Delay after Hioe TdHIOE TlGLQVData Delay from Wait Rising2 TdIORDY TWTHQV Wait Width Time2 TwIORDY TWTLWTHOutput Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsMode True IDE PIO Mode Read/Write Timing SpecificationT6Z TS8G~16GCF600 True IDE Multiword DMA Mode Read/Write Timing Specification TS8G~16GCF600 True IDE Ultra DMA Mode Read/Write Timing Specification PC Card MEM PC Card IO ModeMode Udma True IDE Mode UdmaTS8G~16GCF600 Name Name Comment Name Mode Mode4 Min Max14.7 72.9 50.9Name Min MaxCard Configuration Multiple Function CompactFlash Storage CardsREG Selected SpaceDmardy Strobe Dmarq Dmack Stop HioeDMA Inpack REG Hiow Wait Hioe CMDTable Attribute Memory Function Attribute Memory FunctionDMA CMD REG Configuration Option Register Base + 00h in Attribute Memory TS8G~16GCF600 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Table Pcmcia Mode I/O Function Transfer FunctionDMA CMD REG -CE2Dmarq Dmack Stop Hioe Wait DMA A10 Table PC Card I/O Mode Udma FunctionInpack REG Hiow Wait Hioe CMD A00 Common Memory Transfer Function Table Common Memory FunctionDMA REG CE2 CE1 D15-D8True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingTrue IDE Mode Addressing Memory Mapped AddressingCF-ATA Registers Data Register Address 1F0h170hOffset 0,8,9Feature Register Address 1F1h171h Offset 1, 0Dh Write Only Sector Count Register Address 1F2h172h OffsetSector Number LBA 7-0 Register Address 1F3h173h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetTS8G~16GCF600 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh CF-ATA Command Set Command CodeDefinitions Check Power Mode 98h or E5h Execute Drive Diagnostic 90hBit Command Cyl High Cyl Low Sec Num Sec Cnt FeatureTranscend Information Inc Erase Sectors C0hFlush Cache E7h Format Track 50hDrive Cyl High Cyl Low Sec Num Sec Cnt Feature Word Default Total Data Field Type InformationIdentify Device Ech BytesPIO data transfer cycle timing mode Command sets supportedXXXXh Command sets enabled Ultra DMA Mode Supported and SelectedWord 0 General Configuration CF Advanced True IDE Timing Mode Capability and SettingCF Advanced PC Card I/O and Memory Timing Mode Capability Key management schemes supportedWord 1 Default Number of Cylinders Word 3 Default Number of HeadsWord 6 Default Number of Sectors per Track Word 49 Capabilities Bit 13 Standby TimerMultiple Sector Setting Total Sectors Addressable in LBA ModeCurrent Number of Cylinders, Heads, Sectors/Track Current CapacityRecommended Multiword DMA transfer cycle time Words 82-84 Features/command sets supportedWord 68 Minimum PIO transfer cycle time with Iordy Words 85-87 Features/command sets enabled Word 88 Ultra DMA Modes Supported and SelectedWord 89 Time required for Security erase unit completion Word 91 Advanced power management level valueWord 128 Security Status Bit 8 Security Level Word 160 Power Requirement Description Value Maximum PIO mode timing selectedValue Maximum Multiword DMA timing mode supported Additional Requirements for CF Advanced Timing ModesValue Current PIO timing mode selected Value Maximum Pcmcia IO timing mode SupportedValue Maximum Memory timing mode Supported Current Multiword DMA timing mode selectedValue Maximum PC Card Memory Udma timing mode Supported Value Maximum PC Card I/O Udma timing mode SupportedValue PC Card Memory or I/O Udma timing mode Selected Idle 97h or E3h Idle Immediate 95h or E1hInitialize Drive Parameters 91h Drive Cyl High Cyl Low Sec Num Sec CntRead Buffer E4h NOP 00hRead DMA C8h Read Long Sector 22h or 23h TS8G~16GCF600 Seek 7Xh Set Features EFh Request Sense 03hFeature Supported TS8G~16GCF600 Standby Immediate 94h or E0h Translate Sector 87h Translate Sector InformationWear Level F5h Write Buffer E8h Write DMA CAh TS8G~16GCF600 TS8G~16GCF600 BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERR Error PostingNOP S. Table Capacity Ordering Information Transcend Product Capacity CompactFlash Card