Agilent Technologies FS2334 Connecting to your Target System, Signal Isolation on the Probe

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Connecting to your Target System

To connect the probe to the DDR2 bus, select an available DDR2 slot. Remove the DDR2 DIMM module, if present. Install the DDR2 DIMM module into the 240 pin connector on the top of the FS2334 probe.

Install the DDR2 probe/DIMM into the target system.

Connect the supplemental power supply to the FS2334.

Connect the FS2334 Headers directly to the logic analyzer pods per the configuration file requirements if not done prior to installing the probe. Refer to the General Purpose Probe.

Signal Isolation on the Probe

All signals sent to the logic analyzer from the FS2334 DDR2 probe are isolated from the DDR2 DIMM bus by a parallel RC network of 20K ohms and .3 pF. These resistors are placed in a manner to minimize stubs seen by the DIMM bus and to match lengths to the DIMM module so that Data bits and their Strobe/Mask bits are matched to within 20 ps.

Buffered signals on the probe

The DDR2 DIMM bus Control signals are buffered on the probe before they are connected to the DIMM. This includes the S0:1, CKE0:1, and ODT0:1 signals.

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Contents DDR2 Dimm High Speed Probe FS2334 Product Warranty Appendix For Sales and Marketing Support For Technical SupportExclusive Remedies Product WarrantySoftware License Agreement Definitions IntroductionProbe Components Probe Technical Feature SummaryFS2334 Probe Description Connecting the DDR2 Probe to the Logic Analyzer Signal Assignments on Probe PodsSignal Threshold Voltage Settings Test Points Buffered signals on the probe Connecting to your Target SystemSignal Isolation on the Probe Write state analysis Page 169xx Licensing Setting up the 169xx AnalyzerSoftware Requirements Offline Analysis Page Taking a Trace, Triggering, and Seeing Measurement Results Decoding DDR CommandsTimingZoom Analysis Overview State AnalysisState Analysis Operation Read and Write at 667MT/s or slower Process for setting sampling positions at speeds of 800MT/s State analysis calibration procedure Page Page Adjusting the sampling positions with controlled stimulus Page State Display Loading the FS1140 FS1140 Installation and LicensingSetting up the FS1140 DDR2 Tool Statistics Timing Analysis ExportPage Appendix Header 1 CommandDP16P/ CLK CK0 Header 2 Command NC3 Header 3 Write DQ9 Header 4 Write Ground D13 DQ22 20K ohm to D14 DQ18 D15 DQ23 Header 5 Write CB0 CB1 20K ohm to Ground D13 No connection D14 D15 Header 6 Write DM5DQS14 Header 7 -Write 20K ohm to Ground D13 DQ50 D14 DQ55 D15 DQ51 Header 8 Write SDA Header 12 Read Duplicates only data signals 20K ohm to Ground D15 No connection Header 10 Read Duplicates only data signals DP16P/ CLK CB7 Header 11 Read Duplicates only data signals DP16P/ CLK RAS Header 9 Read Duplicates only data signals DP16P/ CLK CK2 Header 13 Read Duplicates only data signals Ground D13 DQ50 20K ohm to D14 DQ55 D15 DQ51