National CP3BT26 manuals
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278 pages 4.11 Mb
CP3BT26 Connectivity Processor with Bluetooth and Dual CAN Interfaces PRELIMINARY CP3BT26 Reprogrammable Connectivity Processor with Bluetooth, USB, and CAN Interfaces1.0 General Description Block Diagram 2 Table of Contents6.0 Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.0 System Configuration Registers . . . . . . . . . . . . . . . 29 8.0 Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9.0 DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 10.0 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 11.0 Triple Clock and Reset . . . . . . . . . . . . . . . . . . . . . . . 51 12.0 Power Management. . . . . . . . . . . . . . . . . . . . . . . . . . 56 13.0 Multi-Input Wake-Up . . . . . . . . . . . . . . . . . . . . . . . . . 61 14.0 Input/Output Ports. . . . . . . . . . . . . . . . . . . . . . . . . . . 67 15.0 Bluetooth Controller . . . . . . . . . . . . . . . . . . . . . . . . . 72 16.0 12-Bit Analog to Digital Converter. . . . . . . . . . . . . . 79 17.0 Random Number Generator (RNG). . . . . . . . . . . . . . 88 18.0 USB Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 19.0 CAN Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 20.0 Advanced Audio Interface. . . . . . . . . . . . . . . . . . . . 143 21.0 CVSD/PCM Conversion Module . . . . . . . . . . . . . . . 158 22.0 UART Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 23.0 Microwire/SPI Interface . . . . . . . . . . . . . . . . . . . . . . 175 24.0 ACCESS.bus Interface. . . . . . . . . . . . . . . . . . . . . . . 181 25.0 Timing and Watchdog Module . . . . . . . . . . . . . . . . 192 26.0 Multi-Function Timer . . . . . . . . . . . . . . . . . . . . . . . . 196 27.0 Versatile Timer Unit (VTU). . . . . . . . . . . . . . . . . . . . 206 31.0 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . 269 CP3BT26 3 2.0 Features4 3.0 Device Overview3.1 CR16C CPU CORE 3.2 MEMORY 3.3 INPUT/OUTPUT PORTS 3.4 BUS INTERFACE UNIT 3.5 INTERRUPT CONTROL UNIT (ICU) 3.6 MULTI-INPUT WAKE-UP 5 3.7 BLUETOOTH LLC3.8 USB 3.9 CAN INTERFACE 3.10 QUAD UART 3.11 ADVANCED AUDIO INTERFACE 3.12 CVSD/PCM CONVERSION MODULE 3.13 12-BIT ANALOG TO DIGITAL CONVERTER 6 CP3BT263.14 RANDOM NUMBER GENERATOR 3.15 MICROWIRE/SPI 3.16 ACCESS.BUS INTERFACE 3.17 MULTI-FUNCTION TIMER 3.18 TIMING AND WATCHDOG MODULE 3.19 VERSATILE TIMER UNIT 3.20 TRIPLE CLOCK AND RESET 7 3.21 POWER MANAGEMENT3.22 DMA CONTROLLER 3.23 SERIAL DEBUG INTERFACE 3.24 DEVELOPMENT SUPPORT 8 4.0 Signal DescriptionsCP3BT26 (LQFP-128) CP3BT26 (LQFP-144) 15 15 5.0 CPU Architecture24 6.0 Memory6.1 OPERATING ENVIRONMENT 25 25 6.2 BUS INTERFAC E UNIT (BIU) 6.3 BUS CYCLES 6.4 BIU CONTROL REGISTERS 26 CP3BT2629 7.0 System Configuration Registers31 8.0 Flash Memory41 9.0 DMA Controller47 10.0 Interrupts51 11.0 Triple Clock and Reset56 12.0 Power Management12.1 ACTIVE MODE 12.2 POWER SAVE MODE 57 57 12.3 IDLE MODE 12.4 HALT MODE 12.5 HARDWARE CLOCK CONTROL 12.6 POWER MANAGEMENT REGISTERS 59 59 12.7 SWITCHING BETWEEN POWER MODES 61 13.0 Multi-Input Wake-Up67 14.0 Input/Output Ports72 15.0 Bluetooth Controller79 16.0 12-Bit Analog to Digital Converter16.1 FUNCTIONAL DESCRIPTION 81 81 16.2 TOUCHSCREEN INTERFACE 83 83 16.3 ADC OPERATION IN POWER-SAVING MODES 16.4 FREEZE 16.5 ADC REGISTER SET 88 17.0 Random Number Generator (RNG)17.1 FREEZE 89 89 17.2 RANDOM NUMBER GENERATOR REGISTER SET 90 18.0 USB Controller109 19.0 CAN Module143 20.0 Advanced Audio Interface158 21.0 CVSD/PCM Conversion Module21.1 OPERATION 21.2 PCM CONVERSIONS 159 159 21.3 CVSD CONVERSION 21.4 PCM TO CVSD CONVERSION 21.5 CVSD TO PCM CONVERSION 21.6 INTERRUPT GENERATION 21.7 DMA SUPPORT 160 21.8 FREEZE21.9 CVSD/PCM CONVERTER REGISTERS 163 163 22.0 UART Modules175 23.0 Microwire/SPI Interface23.1 MICROWIRE OPERATION 177 177 23.2 MASTER MODEFigure 88. Alternate Mode (SCIDL = 1) Figure 85. Normal Mode (SCIDL = 0) Figure 86. Normal Mode (SCIDL = 1) Figure 87. Alternate Mode (SCIDL = 0) 178 23.3 SLAVE MODE23.4 INTERRUPT GENERATION 179 179 23.5 MICROWIRE INTERFACE REGISTERS 181 181 24.0 ACCESS.bus Interface24.1 ACB PROTOCOL OVERVIEW 183 183 24.2 ACB FUNCTIONAL DESCRIPTION 185 185 24.3 ACCESS.BUS INTERFACE REGISTERS 189 189 24.4 USAGE HINTS 192 25.0 Timing and Watchdog Module25.1 TWM STRUCTURE 25.2 TIMER T0 OPERATION 193 193 25.3 WATCHDOG OPERATION 25.4 TWM REGISTERS 195 195 25.5 WATCHDOG PROGRAMMING PROCEDURE 196 26.0 Multi-Function Timer206 27.0 Versatile Timer Unit (VTU)214 28.0 Register Map230 29.0 Register Bit Fields243 30.0 Electrical Characteristics269 31.0 Pin AssignmentsFigure 136. CP3BT26 in the LQFP-128 Package (Top View) 31.1 LQFP-128 PACKAGECP3BT26 (LQFP-128) 4, 10, 17, 43, 45, 49, 53, 67, 76, 79, 110, 117, 119, 124 PWR IOVCC 7, 13, 21, 42, 44, 47, 51, 58, 74, 75, 80, 107, 115, 121, 127 PWR X1CKO 26 O X1CKI BBCLK 27 I AGND 28 PWR www.national.com 272 272 31.2 LQFP-144 PACKAGEFigure 137. CP3BT26 in the LQFP-144 Package (Top View) CP3BT26 (LQFP-144) 276 32.0 Revision History
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