ADTRAN 4200659L5, 4200659L1, 4175043L2, 4200659L8, 4200659L2, 4200659L7, 4200659L3 XCV Threshold

Chapter 3. Configuration

signal or reception of AIS will cause the unit to enter hold-over mode. The STS-1 receive signal must be valid for at least 10 seconds for the unit to exit hold-over mode and restore loop timing.

When the unit is configured for FREE-RUNtiming mode, timing is derived from a +/-20 ppm internal reference providing a SONET Minimum Clock (SMC).

Setting the unit to EXTERNAL timing mode configures the unit to derive clocking from one of the two external sources selected in the PRI EXT. CLOCK and SEC EXT. CLOCK options. These two entries select which of the 28 active T1/E1 ports will be used as the external clock source. The external clock source may be disabled (if only one source exists, or no external clock sources are desired). A valid clock source is one on which neither LOS or AIS conditions exist. The selected T1/E1 may be a data carrying tributary. When both sources are configured, failure of one source will cause the unit to switch to the other source (if it is a valid source). Failure of both sources will cause the unit to enter hold-over mode. At least one external clock source must be valid for at least 10 seconds for the unit to exit hold-over mode and restore external clock timing.

Switching between PRImary and SECondary external clock sources is non-reverting.

XCV Threshold

The XCV THRESHOLD (excessive code violations threshold) sets a limit on code violations accepted by the unit before it switches controller cards. If set to DISABLED, code violations will not cause the unit to switch controller cards. The threshold limits are described in the following chart:

3-4 MX2800 STS-1 User Manual 61200659L1-1