5 Language Reference
*SRE
*SRE?
This command sets the condition of the Service Request Enable Register. This register determines which bits from the Status Byte Register are allowed to set the Master Status Summary (MSS) bit and the Request for Service (RQS) summary bit. A 1 in any Service Request Enable Register bit position enables the corresponding Status Byte Register bit and all such enabled bits then are logically
When the controller conducts a serial poll in response to SRQ, the RQS bit is cleared, but the MSS bit is not. When *SRE is cleared (by programming it with 0), the power supply cannot generate an SRQ to the controller. The query returns the current state of *SRE.
*STB?
This query reads the Status Byte register, which contains the status summary bits and the Output Queue MAV bit. Reading the Status Byte register does not clear it. The input summary bits are cleared when the appropriate event registers are read. The MAV bit is cleared at
A serial poll also returns the value of the Status Byte register, except that bit 6 returns Request for Service (RQS) instead of Master Status Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is set, it indicates that the power supply has one or more reasons for requesting service.
Bit Position | 7 | 6 | 5 | 4 | 3 | 2 | 1 − 0 |
Bit Value | 128 | 64 | 32 | 16 | 8 | 4 | − |
Bit Name | OPER | MSS | ESB | MAV | QUES | ERR | − |
|
| (RQS) |
|
|
|
|
|
OPER = Operation status summary MSS = Master status summary (RQS) = Request for service
ESB = Event status byte summary
MAV = Message available
QUES = Questionable status summary ERR = Error queue not empty
*WAI
This command instructs the power supply not to process any further commands until all pending operations are completed. Pending operations are as defined under the *OPC command. *WAI can be aborted only by sending the power supply a Device Clear command.
76 | Series N5700 User’s Guide |
