Revision | Agilent Technologies FS2331 instruction

FuturePlus® Systems Corporation

DDR SDRAM Analysis Probe FS2331

Users Manual

For use with Agilent Technologies Logic Analyzers

Revision 1.4

FuturePlus is a trademark of FuturePlus Systems Corporation

Copyright 2003 FuturePlus Systems Corporation

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Agilent Technologies user manual DDR Sdram Analysis Probe FS2331, Revision

Contents

Revision DDR Sdram Analysis Probe FS2331 How to reach us Product Warranty Signal Connections For Sales and Marketing Support For Technical Support Limitation of warranty Product WarrantyExclusive Remedies Introduction Probe Cable, Connector NumberingDefinitions Logic Analyzer Modules FS2331 100 pin Connector to Pod Diagram FS2331 Probe Description Probe Feature SummaryProbe Components Probe Design DDR CommandsState Clock Generation DDR DataPage Pod Clock Domain Clock Rate Probe Pod Assignment Probe Switch Settings Switch # Default factory Function PositionOn closed Connecting the Probe to the Logic Analyzer Logic Analyzer Signal Threshold Voltage SettingsConnecting Power to the FS2331 Probe Card Requirements for PC2700 Systems 16753/4/5/6 Logic Analyzer Card RequirementsRecommended Setting up the 169xx Analyzer Setting up the 167xx AnalyzerSoftware Requirements System Software 169xx Licensing Timing Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory If User is dedicating a Connecting to your Target System Chip Select § Isolate the Dedicated DIMM’s pin Chip Select Jumper locations § Sleeve the Pin Unused Pods § Wire from the adjacent Dimm slot to the isolated pin Offline Analysis Filtering Timing Analysis Operation Loading the Inverse Assembler and Decoding DDR CommandsState Analysis Operation Taking a Trace, Triggering, and Seeing Measurement Results Inverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Dimm Signal Loading Option Using the FS2331 DDR Probe with an Interposer FS1024/25 FS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Set the final analyzer sample position Adjust the delay line value to maximize R/W overlapPage Standards supported General Information Samtec Signal Connections J1 Data SA0 CB4 J2 Data and Command Spare J3 Command and Data Buffcmdclk DM5DQS14 J4 Data DQS7