The correct logic analyzer sample position for the data valid windows is just to the left of (before) the analyzer clock. This ensures that the data being sent by the controller prior to issuing the strobe is the data sampled by the analyzer. Before moving on to step 3 the sample positions for all data lines should be moved to the left of the clock.
This can be done by grabbing the blue lines on the right side of the clock and dragging them to the left into the proper data valid window. You can grab any of the blue lines on the “stack of channels” or “bus composite” views and all of the sample positionsorfthat label will be adjusted. If a portion of another data valid window appears at the far left of the display and a blue line moves into that window, you can move it to the proper window by expanding the display (as described previously) for the appropriate label and moving the blue line just for the offending signal. After placing the blue lines in the proper data valid window, select the
Setting the sample position for the strobes to the data valid window at the center of the display will cause them to be sampled just after the active edge that caused data to be sampled. Thus, the first transfer of a burst will always show a strobe value of 1, and the last will show a strobe value of 0. This is necessary since for read cycles the strobes are delayed enough that the sample position adjustment range of the analyzer may not be sufficient to sample them before the active edge of the strobe. The sampling strategy for read and write cycles should be consistent to produce consistent output from the analyzer. This does however mean that Data will be sampled before the clock and strobes after the clock (the DataClk signal itself should be sampled before the clock.).
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