Notice in this display the data valid windows are reduced in size. This is because the measured windows represent the intersection of the read and write windows.
Notice also that there is almost no data valid window for the strobes. This is unavoidable since the timing of the strobes still shift one quarter clock cycle between read and write bursts. The data valid window thus shrinks to the natural overlap of the strobe timings. Signal jitter in real systems usually reduce the window size to zero. Without the separate analyzer clock timing adjustment for read and write bursts the data valid window for all data lines would look very much like the strobes.
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