Agilent Technologies FS2331 guide

The average sample position for the data lines during these read bursts is –2.25ns. This Eye Finder measurement was taken with a read delay line setting of 1.8ns. You now have enough information to calculate what an optimal read delay setting would be to capture both read and write bursts. Proceed to Step 4 to do this.

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Agilent Technologies FS2331 user manual

Contents

DDR Sdram Analysis Probe FS2331 Revision How to reach us Product Warranty Signal Connections For Technical Support For Sales and Marketing Support Exclusive Remedies Product WarrantyLimitation of warranty Probe Cable, Connector Numbering IntroductionDefinitions Logic Analyzer Modules FS2331 100 pin Connector to Pod Diagram Probe Components Probe Feature SummaryFS2331 Probe Description DDR Commands Probe DesignState Clock Generation DDR DataPage Probe Pod Assignment Pod Clock Domain Clock Rate On closed Switch # Default factory Function PositionProbe Switch Settings Connecting Power to the FS2331 Probe Logic Analyzer Signal Threshold Voltage SettingsConnecting the Probe to the Logic Analyzer Card Requirements for PC2700 Systems Recommended Logic Analyzer Card Requirements16753/4/5/6 Setting up the 167xx Analyzer Setting up the 169xx AnalyzerSoftware Requirements System Software 169xx Licensing Timing Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory Connecting to your Target System Chip Select If User is dedicating a Chip Select Jumper locations § Isolate the Dedicated DIMM’s pin § Sleeve the Pin § Wire from the adjacent Dimm slot to the isolated pin Unused Pods Offline Analysis Filtering Loading the Inverse Assembler and Decoding DDR Commands Timing Analysis OperationState Analysis Operation Taking a Trace, Triggering, and Seeing Measurement Results Inverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Using the FS2331 DDR Probe with an Interposer FS1024/25 Dimm Signal Loading Option FS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Adjust the delay line value to maximize R/W overlap Set the final analyzer sample positionPage General Information Standards supported Signal Connections J1 Data Samtec SA0 J2 Data and Command CB4 Spare J3 Command and Data Buffcmdclk J4 Data DM5DQS14 DQS7