AMD 10, 27493, 27488 manual List of Figures, Logic Symbol Diagram

Preliminary Information

26237C —May 2003 AMD Athlon™ XP Processor Model 10 Data Sheet

List of Figures

Figure 1. Typical AMD Athlon™ XP Processor Model 10 System

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 2. Logic Symbol Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3. AMD Athlon XP Processor Model 10 Power

Management States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 4. AMD Athlon System Bus Disconnect Sequence in the

Stop Grant State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 5. Exiting the Stop Grant State and Bus Connect Sequence . . . . 15

Figure 6. Northbridge Connect State Diagram . . . . . . . . . . . . . . . . . . . . . 16

Figure 7. Processor Connect State Diagram . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 8. SYSCLK Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 9. SYSCLK Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 10. VCC_CORE Voltage Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 11. SYSCLK and SYSCLK# Differential Clock Signals . . . . . . . . . 35

Figure 12. General ATE Open-Drain Test Circuit. . . . . . . . . . . . . . . . . . . . 38

Figure 13. Signal Relationship Requirements During Power-Up
	Sequence	43
Figure 14. AMD Athlon XP Processor Model 10 Part Number
	27488 OPGA Package Diagram	49
Figure 15.	AMD Athlon XP Processor Model 10 Part Number
	27493 OPGA Package Diagram	51
Figure 16.	AMD Athlon XP Processor Model 10 Pin Diagram
	—Topside View	54
Figure 17.	AMD Athlon XP Processor Model 10 Pin Diagram
	—Bottomside View	55
Figure 18.	OPN Example for the AMD Athlon XP Processor
	Model 10	79

List of Figures vii