Cypress CY14B101P NvSRAM Special Instructions, Write RTC Wrtc Instruction, Software Store Store

PRELIMINARYCY14B101P

Figure 14. Read RTC (RDRTC) Instruction Timing

CS

	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
SCK
				Op-Code
SI	0	0	0	1	0	0	1	1	0	0	0	0	A3 A2 A1			A0
									MSB							LSB
SO																	D7	D6 D5 D4 D3				D2 D1 D0
																MSB				Data				LSB

WRITE RTC (WRTC) Instruction

WRITE RTC (WRTC) instruction allows the user to modify the contents of RTC registers. The WRTC instruction requires the WEN bit to be set to '1' before it can be issued. If WEN bit is '0', a WREN instruction needs to be issued before using WRTC. Writing RTC registers requires the following sequence: After the CS line is pulled LOW to select a device, WRTC opcode is trans- mitted through the SI line followed by eight address bits identi- fying the register which is to be written to and one or more bytes

of data. WRTC allows burst mode write operation. When writing more than one registers in burst mode, the address rolls over to 0x00 after the last RTC address (0x0F) is reached.

Note that writing to RTC timekeeping and control registers require the W bit to be set to '1'. The values in these RTC registers take effect only after the W bit is cleared to '0'. Write Enable bit (WEN) is automatically cleared to ‘0’ after completion of the WRTC instruction.

Figure 15. Write RTC (WRTC) Instruction Timing

CS

	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
SCK
				Op-Code									4-bit Address
SI	0	0	0	1	0	0	1	0	0	0	0	0	A3	A2	A1	A0	D7 D6 D5			D4	D3	D2	D1	D0
									MSB							LSB	MSB			Data			LSB
SO													HI-Z

nvSRAM Special Instructions

CY14B101P provides four special instructions that allow access to the nvSRAM specific functions: STORE, RECALL, ASDISB, and ASENB. Table 7 lists these instructions.

Table 7. nvSRAM Special Instructions

Function Name	Opcode	Operation
STORE	0011 1100	Software Store
RECALL	0110 0000	Software Recall
ASENB	0101 1001	AutoStore Enable
ASDISB	0001 1001	AutoStore Disable

irrespective of whether a write has taken place since last STORE or RECALL operation.

Figure 16. Software STORE Operation

CS
	0	1	2	3	4	5	6	7
SCK
SI	0	0	1	1	1	1	0	0
SO				Hi-Z

Software Store (STORE)

When a STORE instruction is executed, CY14B101P performs a Software Store operation. The STORE operation is issued

Document #: 001-44109 Rev. *B

To issue this instruction, the device must be write enabled (WEN bit = ‘1’).The instruction is performed by transmitting the STORE opcode on the SI pin following the falling edge of CS. The WEN

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