PRELIMINARY CY14B101P
Document #: 001-44109 Rev. *B Page 11 of 32
READ RTC (RDRTC) Instruction
Read RTC (RDRTC) instruction allows the user to read the
contents of RTC registers. Reading the RTC registers through
the serial output (SO) pin requires the following sequence: After
the CS line is pulled LOW to select a device, the RDRTC opcode
is transmitted through the SI line followed by eight address bits
for selecting the register. Any data on the SI line after the address
bits is ignored. The data (D7-D0) at the specified address is then
shifted out onto the SO line. RDRTC also allows burst mode read
operation. When reading multiple bytes from RTC registers, the
address rolls over to 0x00 after the last RTC register address
(0x0F) is reached.
The R bit in RTC Flag register must be set to '1' before reading
RTC time keeping registers to avoid reading transitional data.
Modifying the RTC Flag registers requires a Write RTC cycle.
The R bit must be cleared to '0' after completion of the read
operation.
The easiest way to read RTC registers is to perform RDRTC in
burst mode. The read may start from the first RTC register (0x00)
and the CS must be held LOW to allow the data from all 16 RTC
registers to be transmitted through the SO pin.
Note Read RTC instruction operates at a maximum clock
frequency of 25 MHz.
Figure 11. Burst Mode Read Instruction Timing
Figure 12. Write Instruction Timing
Figure 13. Burst Mode Write Instruction Timing
CS
SCK
SO
LSB
SI
Op-Code
17-bit Address
MSB LSB
~
~
~
~
~
~
012 3 456 7 0765432
120 21 22 23 01234567 01234567
~
~
07
00000011 0 0 00 00 0
A16 A3 A2 A1 A0
D0
D1
D2D3
D4
D5
D6
D7
Data Byte 1 Data Byte N
MSB LSB
MSB
D0
D1
D2D3
D4
D5
D6
D7 D0D7
~
~
CS
SCK
SO
012345
6 7 0765432
12021222301234567
MSB LSB
Data
D0D1
D2
D3
D4
D5D6D7
SI
~
~
Op-Code
0000001 0000
00
00
A16 A3 A1A2 A0
17-bit Address
MSB LSB
HI-Z
~
~
CS
SCK
SO
MSB LSB
SI
Op-Code
17-bit Address
MSB LSB
~
~
~
~
01234567
076 5 432
120 21 22 23 01234567 01234567
~
~
07
000000
100000000
A16 A3 A2 A1 A0
HI-Z
Data Byte 1 Data Byte N
D0
D1
D2D3
D4
D5
D6
D7
D0
D1
D2D3
D4
D5
D6
D7 D0D7
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