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Cypress CY7C1446AV33, CY7C1440AV33, CY7C1442AV33 manual Switching Waveforms, Read Cycle Timing26

Models: CY7C1440AV33 CY7C1446AV33 CY7C1442AV33

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CY7C1440AV33

CY7C1442AV33

CY7C1446AV33

Switching Waveforms

Read Cycle Timing[26]

tCYC

CLK

tCH

tADS tADH

ADSP

ADSC

tAS tAH

tCL

tADS tADH

ADDRESS

GW, BWE, BWx

A2	A3
tWES tWEH	Burst continued with
tWES tWEH	new base address

tCES	tCEH								Deselect
tCES	tCEH								cycle
									cycle
CE
		tADVS	tADVH
ADV
					ADV
					suspends
					burst.
OE
			tOEV	tCO
		tOEHZ	tOELZ	tDOH					tCHZ
		tCLZ
Data Out (Q)	High-Z	Q(A1)		Q(A2)	Q(A2 + 1)	Q(A2 + 2)	Q(A2 + 3)	Q(A2)	Q(A2 + 1)
		tCO
								Burst wraps around
								to its initial state
		Single READ				BURST READ
				DON’T CARE	UNDEFINED

Note:

26. On this diagram, when CE is LOW: CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH: CE1 is HIGH or CE2 is LOW or CE3 is HIGH.

Document #: 38-05383 Rev. *E

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Cypress CY7C1446AV33, CY7C1440AV33, CY7C1442AV33 manual Switching Waveforms, Read Cycle Timing26

Contents

Functional Description1 FeaturesSelection Guide 250 MHz 200 MHz 167 MHz Unit Logic Block Diagram CY7C1442AV33 2M x Logic Block Diagram CY7C1440AV33 1M x CY7C1440AV33 CY7C1442AV33 2M x Pin Configurations Pin Tqfp Pinout CY7C1442AV33 2M x Pin Definitions Name DescriptionByte Write Select Inputs, active LOW. Qualified with Power supply for the I/O circuitry Power supply inputs to the core of the deviceGround for the core of the device Ground for the I/O circuitry Functional Overview Interleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Truth Table for Read/Write4, 8 Truth Table for Read/Write4,8,9Write Cycle, Suspend Burst Function CY7C1440AV33 TAP Controller State Diagram TAP Controller Block DiagramIeee 1149.1 Serial Boundary Scan Jtag Performing a TAP Reset TAP RegistersTAP Instruction Set Bypass TAP Timing 3V TAP AC Test Conditions TAP AC Switching Characteristics Over the operating Range105V TAP AC Test Conditions 5V TAP AC Output Load Equivalent Identification Register Definitions TAP DC Electrical Characteristics And Operating ConditionsScan Register Sizes Identification Codes SAMPLE/PRELOAD Ball Fbga Boundary Scan Order 14,15Bypass CY7C1440AV33 1M x 36, CY7C1442AV33 2M x Bit # Ball ID CY7C1446AV33 512K x Bit # Ball ID Ball Fbga Boundary Scan Order 14 Maximum Ratings Electrical Characteristics Over the Operating Range17Operating Range Ambient Range Capacitance19 Thermal ResistanceAC Test Loads and Waveforms 250 200 167 Parameter Description Unit Min Switching Characteristics Over the Operating Range 24Min Max Set-up Times Read Cycle Timing26 Switching Waveforms Write Cycle Timing26 CLZ Read/Write Cycle Timing26, 28 DON’T Care ZZ Mode Timing30 Ordering Information 250 Pin Tqfp 14 x 20 x 1.4 mm Package Diagrams Ball Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Issue Date Orig. Description of Change Document HistoryDocument Number Updated the Ordering Information table AC Switching Characteristics table473650 VKN