CY7C63310, CY7C638xx

7.2.6 Destination Direct Source Immediate

The result of an instruction using this addressing mode is placed within the RAM memory space or the register space. Operand 1 is the address of the result. The source of the instruction is Operand 2, which is an immediate value. Arithmetic instructions require two sources; the second source is the location specified by Operand 1. Instructions using this addressing mode are three bytes in length.

Table 7-12. Destination Direct Source Immediate

Opcode

 

 

Operand 1

Operand 2

Instruction

Destination Address

Immediate Value

 

 

 

 

 

 

Examples

 

 

 

 

 

 

 

 

 

ADD

[7]

 

5

The value in the memory location at address

 

 

 

 

7 is added to the immediate value of 5, and

 

 

 

 

the result is placed in the memory location at

 

 

 

 

address 7.

 

MOV

REG[8]

 

6

The immediate value of 6 is moved into the

 

 

 

 

register space location at address 8.

 

 

 

 

 

 

7.2.7 Destination Indexed Source Immediate

The result of an instruction using this addressing mode is placed within the RAM memory space or the register space. Operand 1 is added to the X register to form the address of the result. The source of the instruction is Operand 2, which is an immediate value. Arithmetic instructions require two sources; the second source is the location specified by Operand 1 added with the X register. Instructions using this addressing mode are three bytes in length.

Table 7-13. Destination Indexed Source Immediate

Opcode

 

Operand 1

Operand 2

Instruction

Destination Index

Immediate Value

 

 

 

 

 

 

Examples

 

 

 

 

 

 

 

 

 

ADD

[X+7]

 

5

The value in the memory location at

 

 

 

 

address X+7 is added with the

 

 

 

 

immediate value of 5, and the result

 

 

 

 

is placed in the memory location at

 

 

 

 

address X+7.

 

 

 

 

MOV

REG[X+8]

6

The immediate value of 6 is moved

 

 

 

 

into the location in the register space

 

 

 

 

at address X+8.

 

 

 

 

 

 

7.2.8 Destination Direct Source Direct

The result of an instruction using this addressing mode is placed within the RAM memory. Operand 1 is the address of the result. Operand 2 is an address that points to a location in the RAM memory that is the source for the instruction. This addressing mode is only valid on the MOV instruction. The instruction using this addressing mode is three bytes in length.

.

Table 7-14. Destination Direct Source Direct

Opcode

 

 

Operand 1

Operand 2

Instruction

 

Destination Address

Source Address

 

 

 

 

 

 

Example

 

 

 

 

 

 

 

 

MOV

[7]

[8]

The value in the memory location at address 8

 

 

 

 

is moved to the memory location at address 7.

 

 

 

 

 

 

7.2.9 Source Indirect Post Increment

The result of an instruction using this addressing mode is placed in the Accumulator. Operand 1 is an address pointing to a location within the memory space, which contains an address (the indirect address) for the source of the instruction. The indirect address is incremented as part of the instruction execution. This addressing mode is only valid on the MVI instruction. The instruction using this addressing mode is two bytes in length. Refer to the PSoC Designer: Assembly Language User Guide for further details on MVI instruction.

Table 7-15. Source Indirect Post Increment

 

Opcode

 

Operand 1

Instruction

 

 

Source Address Address

 

 

 

 

 

Example

 

 

 

 

 

 

 

 

MVI

 

A

[8]

The value in the memory location at address

 

 

 

 

8 is an indirect address. The memory location

 

 

 

 

pointed to by the indirect address is moved

 

 

 

 

into the Accumulator. The indirect address is

 

 

 

 

then incremented.

 

 

 

 

 

 

7.2.10 Destination Indirect Post Increment

The result of an instruction using this addressing mode is placed within the memory space. Operand 1 is an address pointing to a location within the memory space, which contains an address (the indirect address) for the destination of the instruction. The indirect address is incremented as part of the instruction execution. The source for the instruction is the Accumulator. This addressing mode is only valid on the MVI instruction. The instruction using this addressing mode is two bytes in length.

Table 7-16. Destination Indirect Post Increment

 

Opcode

 

 

Operand 1

Instruction

 

Destination Address Address

 

 

 

 

 

Example

 

 

 

 

 

 

 

 

 

MVI

 

[8]

A

 

The value in the memory location at

 

 

 

 

 

address 8 is an indirect address. The

 

 

 

 

 

Accumulator is moved into the memory

 

 

 

 

 

location pointed to by the indirect

 

 

 

 

 

address. The indirect address is then

 

 

 

 

 

incremented.

 

 

 

 

 

 

Document 38-08035 Rev. *K

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Cypress CY7C638xx Destination Direct Source Immediate Opcode Operand, Destination Indexed Source Immediate Opcode Operand
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CY7C638xx, CY7C63310 specifications

The Cypress CY7C63310 and CY7C638xx series are advanced USB microcontrollers designed for various applications requiring reliable performance and flexibility. These chips are notable for their integration of several key technologies, enabling developers to create innovative electronic designs effortlessly.

The CY7C63310 is a part of the Cypress USB microcontroller family that boasts a fully integrated 8051-compatible microprocessor core. This architecture allows for efficient execution of high-level programming languages like C, enhancing code development efforts. The microcontroller supports USB 2.0 full-speed operation, allowing for high data transfer rates of up to 12 Mbps, essential for applications involving data communication.

One of the standout features of the CY7C63310 is its programmable GPIO (General-Purpose Input/Output) pins, which provide developers with the versatility to configure these pins as inputs, outputs, or alternate functions. This flexibility is particularly advantageous in applications where custom interfaces are essential, such as human-machine interfaces, sensor control, and USB peripherals.

Moreover, the CY7C638xx series presents an even broader array of features. These devices typically support various memory configurations, enabling designers to select from different on-chip RAM and flash memory options. This variety empowers projects requiring a mix of program and data storage capabilities, all while ensuring that performance remains optimal.

Both the CY7C63310 and CY7C638xx series leverage Cypress's EZ-USB technology, which simplifies the process of USB interface implementation. The EZ-USB architecture minimizes the effort associated with USB protocol complexity, allowing developers to focus on the core functionality of their applications.

These microcontrollers also incorporate features such as low-power operation, making them ideal for battery-operated devices. With various power management modes, designers can optimize energy consumption according to the specific needs of their applications.

In terms of connectivity, these chips support multiple interface standards, including SPI, I2C, and UART. These capabilities ensure that developers can easily interface with other components and systems, enhancing the overall utility of the microcontroller.

In summary, the Cypress CY7C63310 and CY7C638xx microcontrollers stand out for their robust features, including integrated USB functionality, flexible GPIO options, and support for various communication protocols. These attributes make them suitable for a wide range of applications, from consumer electronics to industrial automation, making them an excellent choice for developers seeking reliable and adaptable microcontroller solutions.
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