Cypress CY7C63310, CY7C638xx manual CPU Clock During Sleep Mode, Clock IO Config Clkiocr 0x32 R/W

CY7C63310, CY7C638xx

Figure 10-3. Timer Capture Block Diagram

System Clock	Configuration Status
	and Control

Captimer Clock

16-bit counter Prescale Mux

Capture Registers

1ms	Overflow
timer	Interrupt

Capture0 Int Capture1 Int

Interrupt Controller

Table 10-7. Clock IO Config (CLKIOCR) [0x32] [R/W]

Bit #	7	6	5		4	3	2	1	0
Field				Reserved				CLKOUT Select
Read/Write	–	–	–		-	-	-	R/W	R/W
Default	0	0	0		0	0	0	0	0

Bit [7:2]: Reserved

Bit [1:0]: CLKOUT Select

0 0 = Internal 24 MHz Oscillator

0 1 = External clock – external clock at CLKIN (P0.0) 1 0 = Internal 32 kHz low power oscillator

1 1 = CPUCLK

10.2 CPU Clock During Sleep Mode

When the CPU enters sleep mode the CPUCLK Select (Bit [0], Table 10-3on page 22) is forced to the Internal Oscillator, and the oscillator is stopped. When the CPU comes out of sleep mode it runs on the internal oscillator. The internal oscillator recovery time is three clock cycles of the Internal 32 kHz Low power Oscillator.

If the system requires the CPU to run off the external clock after awaking from sleep mode, the firmware must switch the clock source for the CPU.

Document 38-08035 Rev. *K Page 26 of 83

[+] Feedback