CY7C63310, CY7C638xx

Figure 9-3. SROM Table

 

F8h

F9h

FAh

FBh

FCh

FDh

FEh

FFh

 

 

 

 

 

 

 

 

 

Table0

Silicon ID

Silicon ID

 

 

 

 

 

 

[15-8]

[7-0]

 

 

 

 

 

 

 

 

 

 

 

 

 

Table1

Family/

Revision

 

 

 

 

 

 

 

Die ID

ID

 

 

 

 

 

 

Table2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The Silicon IDs for enCoRe II devices are stored in SROM tables in the part, as shown in Figure 9-3.

The Silicon ID can be read out from the part using SROM Table reads (Table 0). This is demonstrated in the following pseudo code. As mentioned in the section SROM on page 14, the SROM variables occupy address F8h through FFh in the SRAM. Each of the variables and their definition is given in the section SROM on page 14.

AREA SSCParmBlkA(RAM,ABS)

org F8h // Variables

are defined starting at address F8h

SSC_KEY1:

blk 1

; F8h

supervisory

key

SSC_RETURNCODE:

; F8h

result code

 

SSC_KEY2 :

blk 1

;F9h

supervisory stack ptr key

SSC_BLOCKID:

blk 1

; FAh

block ID

 

SSC_POINTER:

blk 1

; FBh

pointer to data buffer

SSC_CLOCK:

blk 1

; FCh

Clock

 

SSC_MODE:

blk 1

; FDh

ClockW ClockE multiplier

SSC_DELAY:

blk 1

; FEh

flash macro sequence delay count

SSC_WRITE_ResultCode: blk

1 ; FFh

temporary result code

_main:

A, 0

 

 

mov

 

 

mov

[SSC_BLOCKID], A// To read from Table 0 - Silicon ID is stored in Table 0

//Call SROM operation to read the SROM table

mov

X, SP

; copy SP into X

mov

A, X

; A temp stored in X

add

A, 3

 

; create 3 byte stack frame (2 + pushed A)

mov

[SSC_KEY2], A

; save stack frame for supervisory code

; load the supervisory code for flash operations

mov

[SSC_KEY1], 3Ah

;FLASH_OPER_KEY - 3Ah

mov

A,6

; load A with specific operation. 06h is the code for Table read Table 9-1

SSC

 

; SSC call the supervisory ROM

// At the end of the SSC command the silicon ID is stored in F8 (MSB) and F9(LSB) of the SRAM

.terminate:

jmp .terminate

Document 38-08035 Rev. *K

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Cypress CY7C63310, CY7C638xx manual Srom Table

CY7C638xx, CY7C63310 specifications

The Cypress CY7C63310 and CY7C638xx series are advanced USB microcontrollers designed for various applications requiring reliable performance and flexibility. These chips are notable for their integration of several key technologies, enabling developers to create innovative electronic designs effortlessly.

The CY7C63310 is a part of the Cypress USB microcontroller family that boasts a fully integrated 8051-compatible microprocessor core. This architecture allows for efficient execution of high-level programming languages like C, enhancing code development efforts. The microcontroller supports USB 2.0 full-speed operation, allowing for high data transfer rates of up to 12 Mbps, essential for applications involving data communication.

One of the standout features of the CY7C63310 is its programmable GPIO (General-Purpose Input/Output) pins, which provide developers with the versatility to configure these pins as inputs, outputs, or alternate functions. This flexibility is particularly advantageous in applications where custom interfaces are essential, such as human-machine interfaces, sensor control, and USB peripherals.

Moreover, the CY7C638xx series presents an even broader array of features. These devices typically support various memory configurations, enabling designers to select from different on-chip RAM and flash memory options. This variety empowers projects requiring a mix of program and data storage capabilities, all while ensuring that performance remains optimal.

Both the CY7C63310 and CY7C638xx series leverage Cypress's EZ-USB technology, which simplifies the process of USB interface implementation. The EZ-USB architecture minimizes the effort associated with USB protocol complexity, allowing developers to focus on the core functionality of their applications.

These microcontrollers also incorporate features such as low-power operation, making them ideal for battery-operated devices. With various power management modes, designers can optimize energy consumption according to the specific needs of their applications.

In terms of connectivity, these chips support multiple interface standards, including SPI, I2C, and UART. These capabilities ensure that developers can easily interface with other components and systems, enhancing the overall utility of the microcontroller.

In summary, the Cypress CY7C63310 and CY7C638xx microcontrollers stand out for their robust features, including integrated USB functionality, flexible GPIO options, and support for various communication protocols. These attributes make them suitable for a wide range of applications, from consumer electronics to industrial automation, making them an excellent choice for developers seeking reliable and adaptable microcontroller solutions.