Cypress CY7C63310, CY7C638xx manual Intvc

CY7C63310, CY7C638xx

24. Register Summary (continued)

The XIO bit in the CPU Flags Register must be set to access the extended register space for all registers above 0xFF.

Addr	Name	7	6	5	4	3	2	1	0	R/W	Default
E2	INT_VC				Pending Interrupt [7:0]					bbbbbbbb	00000000
E3	RESWDT				Reset Watchdog Timer [7:0]					wwwwwwww	00000000
--	CPU_A				Temporary Register T1 [7:0]					--------	00000000
--	CPU_X					X[7:0]				--------	00000000
--	CPU_PCL				Program Counter [7:0]					--------	00000000
--	CPU_PCH				Program Counter [15:8]					--------	00000000
--	CPU_SP				Stack Pointer [7:0]					--------	00000000
-	CPU_F		Reserved		XOI	Super	Carry	Zero	Global IE	---brwww	00000010
FF	CPU_SCR	GIES	Reserved	WDRS	PORS	Sleep	Reserved	Reserved	Stop	r-ccb--b	00010000
1E0	OSC_CR0	Reserved		No Buzz	Sleep Timer [1:0]		CPU Speed [2:0]			--bbbbbb	00000000
1E3	LVDCR	Reserved		PORLEV[1:0]		Reserved		VM[2:0]		--bb-bbbb	00000000
1EB	ECO_TR	Sleep Duty Cycle [1:0]				Reserved				bb------	00000000
1E4	VLTCMP			Reserved				LVD	PPOR	------rr	00000000

Legend

In the R/W column,

b = Both Read and Write r = Read Only

w = Write Only

c = Read/Clear

? = Unknown

d = calibration value. Must not change during normal use.

Document 38-08035 Rev. *K Page 66 of 83

[+] Feedback