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Cypress CYDC128B16, CYDC064B16, CYDC256B16, CYDC128B08 manual CYDC064B08, Pin Configurations 7, 8, 9

Models: CYDC256B16 CYDC128B16 CYDC128B08 CYDC064B08 CYDC064B16

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CYDC256B16, CYDC128B16,

CYDC064B16, CYDC128B08,

CYDC064B08

Pin Configurations (continued)[7, 8, 9, 10]

100-pin TQFP (Top View)

									A		A		A		A		UB		LB		OE		R/W		SFEN		V		ODR0		ODR1		V		ODR2		ODR3		ODR4		V		R/W		OE		LB		UB		A		A		A		A
									3L		2L		1L		0L		L		L		L		L				SS						SS								SS		R		R		R		R		0R		1R		2R		3R



								100 99					98		97		96		95		94		93		92		91		90		89		88		87		86		85		84		83		82		81		80		79		78		77		76
			A4L					1																																																	75				A4R


			A5L					2																																																	74				A5R
			A5L					2																																																	74				A5R
			A6L					3																																																	73				A6R
			A6L					3																																																	73				A6R
			A7L					4																																																	72				A7R
			A7L					4																																																	72				A7R
			A8L					5																																																	71				A8R
			A8L					5																																																	71				A8R
			CE		L			6																																																	70				CE	R
			CE		L			6																																																	70				CE	R
	SEM				L			7																																																	69				SEM			R
	SEM				L			7																																																	69				SEM			R
		INT			L			8																																																	68				INT		R
		INT			L			8																																																	68				INT		R
BUSY					L			9																																																	67				BUSY				R
BUSY					L			9																																																	67				BUSY				R
			A9L					10																																																	66				A9R
			A9L					10																																																	66				A9R
		A10L						11																	CYDC064B08																																65				A10R
		A10L						11																																																	65				A10R
			VSS					12																																																	64				VSS
			VSS					12																																																	64				VSS
			VCC					13																	CYDC128B08																																63				VCC
																									CYDC128B08

		A11L						14																																																	62				A11R
		A11L						14																																																	62				A11R
		A12L						15																																																	61				A12R
		A12L						15																																																	61				A12R
IRR0[9]								16																																																	60				IRR1[10]
								17																																																	59				NC[11]
			M/S					17																																																	59				NC[11]
VDDIOL								18																																																	58				VDDIOR


	I/O0L							19																																																	57				VSS
	I/O0L							19																																																	57				VSS
	I/O1L							20																																																	56				VSS
	I/O1L							20																																																	56				VSS
	I/O2L							21																																																	55				VSS
	I/O2L							21																																																	55				VSS
			VSS					22																																																	54				VSS
			VSS					22																																																	54				VSS
	I/O3L							23																																																	53				VSS
	I/O3L																																																								53				VSS
	I/O4L							24																																																	52				VSS
	I/O4L							24																																																	52				VSS
	I/O5L							25																																																	51				VSS
	I/O5L							25																																																	51				VSS
								26			27		28		29		30		31		32		33		34		35		36		37		38		39		40		41		42		43		44		45		46		47		48		49		50


									6L		7L		DDIOL		SS		SS		SS		SS		SS		SS		SS		SS		SS [11]				0R		1R		2R		3R		4R		SS		5R		6R		7R		DDIOR		SS		SS
									I/O		I/O		V		V		V		V		V		V		V		V		V		V		NC		I/O		I/O		I/O		I/O		I/O		V		I/O		I/O		I/O		V		V		V

Notes:

8.IRR functionality is not supported for the CYDC128B08 device.

9.This pin is A13L for CYDC128B08 devices.

10. This pin is A13R for CYDC128B08 devices.

Document #: 001-01638 Rev. *E

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Cypress CYDC128B16, CYDC064B16, CYDC256B16, CYDC128B08 manual CYDC064B08, Pin Configurations 7, 8, 9

Contents

Features Selection Guide for VCC =CYDC256B16, CYDC128B16 CYDC064B16, CYDC128B08 CYDC064B08 Unit CYDC256B16, CYDC128B16 Pin Configurations 3, 4, 5, 6 Pin Tqfp Top View Pin Configurations 7, 8, 9 CYDC064B08 Pin Definitions Functional Description Interrupts BusyMaster/Slave Input Read Register Architecture 0 -I/O 2 -I/O Mode 0 -I/O 5 -I/O ModeInput Read Register Operation16 Semaphore Operation Example Function Electrical Characteristics for V CC = Range Ambient TemperatureMaximum Ratings23 Operating Range Input Leakage Current Standb y Cur rent One Port Cmos Ind Output LOW Voltage I OL = 2 mA 5V any port 0V any port ODR Output LOW Voltage I OL = 8 mA 5V any port 0V any portInput High Voltage 5V any port Input LOW Voltage 5V any port 0V any port Capacitance Parameter Description Test Conditions Max Unit AC7Test Loads and Waveforms Write Cycle Interrupt Timing Busy TimingSemaphore Timing High after Slave Data Hold From Write End Document # 001-01638 Rev. *E SEM Address Access Time Document # 001-01638 Rev. *E Switching Waveforms Read Cycle No.1 Either Port Address Access36, 37Read Cycle No.2 Either Port CE/OE Access36, 39 Read Cycle No Either Port36, 38, 41 Write Cycle No CE Controlled Timing 41, 42, 43 Timing Diagram of Semaphore Contention51 Semaphore Read After Write Timing, Either Side49 Timing Diagram of Read with Busy M/S=HIGH53 Write Timing with Busy Input M/S = LOW CER Valid First Busy Timing Diagram No.1 CE Arbitration CEL Valid First54Right Address Valid First Interrupt Timing Diagrams Left Side Sets INT R Right Side Clears INT RRight Side Sets Intl Left Side Clears INT L Ordering Information Package Diagram Pin Thin Plastic Quad Flat Pack Tqfp A100 Issue Date Orig. Description of Change Document History