CYDC256B16, CYDC128B16,
CYDC064B16, CYDC128B08,
CYDC064B08
Document #: 001-01638 Rev. *E Page 7 of 26
When reading a semaphore, all sixteen/eight data lines output
the semaphore value. The read value is latched in an output
register to prevent the semaphore from changing state during
a write from the other port. If both ports attempt to access the
semaphore within tSPS of each other, the semaphore will
definitely be obtained by one side or the other, but there is no
guarantee which side will control the semaphore. On
power-up, both ports should write “1” to all eight semaphores.
Architecture
The CYDC256B16, CYDC128B16, CYDC064B16,
CYDC128B08, CYDC064B08 consist of an array of 4k, 8k, or
16k words of 16 dual-port RAM cells, I/O and address lines,
and control signals (CE, OE, R/W). The CYDC064B08 and
CYDC128B08 consist of an array of 8k and 16k words of 8
each of dual-port RAM cells, I/O and address lines, and control
signals (CE, OE, R/W).These control pins permit independent
access for reads or writes to any location in memory. To handle
simultaneous writes/reads to the same location, a BUSY pin is
provided on each port. Two Interrupt (INT) pins can be utilized
for port-to-port communication. Two Semaphore (SEM)
control pins are used for allocating shared resources. With the
M/S pin, the devices can function as a master (BUSY pins are
outputs) or as a slave (BUSY pins are inputs). The devices
also have an automatic power-down feature controlled by CE.
Each port is provided with its own output enable control (OE),
which allows data to be read from the device.
Notes:
11.This column applies to x16 devices only.
12.See Interrupts Functional Description for specific highest memory locations by device.
13.If BUSYR = L, then no change.
14.If BUSYL = L, then no change.
15.See Functional Description for specific addresses by device.
Table 1.Non-Contending Read/Write
Inputs Outputs
OperationCE R/W OE UB LB SEM I/O8–I/O15[11] I/O0–I/O7
H X X X X H High Z High Z Deselected: Power-down
X X X H H H High Z High Z Deselected: Power-down
L L X L H H Data In High Z Write to Upper Byte Only
L L X H L H High Z Data In Write to Lower Byte Only
L L X L L H Data In Data In Write to Both Bytes
L H L L H H Data Out High Z Read Upper Byte Only
L H L H L H High Z Data Out Read Lower Byte Only
L H L L L H Data Out Data Out Read Both Bytes
X X H X X X High Z High Z Outputs Disabled
H H L X X L Data Out Data Out Read Data in Semaphore Flag
X H L H H L Data Out Data Out Read Data in Semaphore Flag
H X X X L Data In Data In Write DIN0 into Semaphore Flag
X X H H L Data In Data In Write DIN0 into Semaphore Flag
LXXLXL Not Allowed
L X X X L L Not Allowed
Table 2. Interrupt Operation Example (Assumes BUSYL = BUSYR = HIGH)[12]
Function
Left Port Right Port
R/WLCELOELA0L–13L INTLR/WRCEROERA0R–13R INTR
Set Right INTR Flag L L X 3FFF[15] XXXX X L
[14]
Reset Right INTR Flag X X X X X X L L 3FFF[15] H[13]
Set Left INTL Flag X X X X L[13] LLX 3FFE
[15] X
Reset Left INTL Flag X L L 3FFE[15] H
[14] XXX X X
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